[X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly

[oota-llvm.git] / test / CodeGen / NVPTX / vector-args.ll

diff --git a/test/CodeGen/NVPTX/vector-args.ll b/test/CodeGen/NVPTX/vector-args.ll
index 80deae46935afd74faafa3066025b9a5095612ab..c6c8e73bf83ece0e3edf0893b823ed2ed193d479 100644 (file)
--- a/test/CodeGen/NVPTX/vector-args.ll
+++ b/test/CodeGen/NVPTX/vector-args.ll
@@ -4,8 +4,7 @@
 define float @foo(<2 x float> %a) {
 ; CHECK: .func (.param .b32 func_retval0) foo
 ; CHECK: .param .align 8 .b8 foo_param_0[8]
-; CHECK: ld.param.f32 %f{{[0-9]+}}
-; CHECK: ld.param.f32 %f{{[0-9]+}}
+; CHECK: ld.param.v2.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}}
   %t1 = fmul <2 x float> %a, %a
   %t2 = extractelement <2 x float> %t1, i32 0
   %t3 = extractelement <2 x float> %t1, i32 1
@@ -17,11 +16,20 @@ define float @foo(<2 x float> %a) {
 define float @bar(<4 x float> %a) {
 ; CHECK: .func (.param .b32 func_retval0) bar
 ; CHECK: .param .align 16 .b8 bar_param_0[16]
-; CHECK: ld.param.f32 %f{{[0-9]+}}
-; CHECK: ld.param.f32 %f{{[0-9]+}}
+; CHECK: ld.param.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}
   %t1 = fmul <4 x float> %a, %a
   %t2 = extractelement <4 x float> %t1, i32 0
   %t3 = extractelement <4 x float> %t1, i32 1
   %t4 = fadd float %t2, %t3
   ret float %t4
 }
+
+
+define <4 x float> @baz(<4 x float> %a) {
+; CHECK: .func  (.param .align 16 .b8 func_retval0[16]) baz
+; CHECK: .param .align 16 .b8 baz_param_0[16]
+; CHECK: ld.param.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}
+; CHECK: st.param.v4.f32 [func_retval0+0], {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}
+  %t1 = fmul <4 x float> %a, %a
+  ret <4 x float> %t1
+}