Reapply r155682, making constant folding more consistent, with a fix to work

[oota-llvm.git] / test / CodeGen / PTX / sub.ll

diff --git a/test/CodeGen/PTX/sub.ll b/test/CodeGen/PTX/sub.ll
index e11decaf5cf598d1ae7788a4740c8d27f9b74e2e..7ac886ad645effc77672b1ab60eb69f202515812 100644 (file)
--- a/test/CodeGen/PTX/sub.ll
+++ b/test/CodeGen/PTX/sub.ll
@@ -1,29 +1,71 @@
-; RUN: llc < %s -march=ptx | FileCheck %s
+; RUN: llc < %s -march=ptx32 | FileCheck %s
 
-define ptx_device i32 @t1(i32 %x, i32 %y) {
-;CHECK: sub.s32 r0, r1, r2;
+define ptx_device i16 @t1_u16(i16 %x, i16 %y) {
+; CHECK: sub.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}, %rh{{[0-9]+}};
+; CHECK: ret;
+       %z = sub i16 %x, %y
+       ret i16 %z
+}
+
+define ptx_device i32 @t1_u32(i32 %x, i32 %y) {
+; CHECK: sub.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}};
+; CHECK: ret;
        %z = sub i32 %x, %y
-;CHECK: ret;
        ret i32 %z
 }
 
-define ptx_device i32 @t2(i32 %x) {
-;CHECK: add.s32 r0, r1, -1;
-       %z = sub i32 %x, 1
-;CHECK: ret;
-       ret i32 %z
+define ptx_device i64 @t1_u64(i64 %x, i64 %y) {
+; CHECK: sub.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}, %rd{{[0-9]+}};
+; CHECK: ret;
+       %z = sub i64 %x, %y
+       ret i64 %z
 }
 
-define ptx_device float @t3(float %x, float %y) {
-; CHECK: sub.f32 f0, f1, f2
-; CHECK-NEXT: ret;
+define ptx_device float @t1_f32(float %x, float %y) {
+; CHECK: sub.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}
+; CHECK: ret;
   %z = fsub float %x, %y
   ret float %z
 }
 
-define ptx_device float @t4(float %x) {
-; CHECK: add.f32 f0, f1, 0FBF800000;
-; CHECK-NEXT: ret;
+define ptx_device double @t1_f64(double %x, double %y) {
+; CHECK: sub.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, %fd{{[0-9]+}}
+; CHECK: ret;
+  %z = fsub double %x, %y
+  ret double %z
+}
+
+define ptx_device i16 @t2_u16(i16 %x) {
+; CHECK: add.u16 %ret{{[0-9]+}}, %rh{{[0-9]+}}, -1;
+; CHECK: ret;
+       %z = sub i16 %x, 1
+       ret i16 %z
+}
+
+define ptx_device i32 @t2_u32(i32 %x) {
+; CHECK: add.u32 %ret{{[0-9]+}}, %r{{[0-9]+}}, -1;
+; CHECK: ret;
+       %z = sub i32 %x, 1
+       ret i32 %z
+}
+
+define ptx_device i64 @t2_u64(i64 %x) {
+; CHECK: add.u64 %ret{{[0-9]+}}, %rd{{[0-9]+}}, -1;
+; CHECK: ret;
+       %z = sub i64 %x, 1
+       ret i64 %z
+}
+
+define ptx_device float @t2_f32(float %x) {
+; CHECK: add.rn.f32 %ret{{[0-9]+}}, %f{{[0-9]+}}, 0DBFF0000000000000;
+; CHECK: ret;
   %z = fsub float %x, 1.0
   ret float %z
 }
+
+define ptx_device double @t2_f64(double %x) {
+; CHECK: add.rn.f64 %ret{{[0-9]+}}, %fd{{[0-9]+}}, 0DBFF0000000000000;
+; CHECK: ret;
+  %z = fsub double %x, 1.0
+  ret double %z
+}