[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / PowerPC / 2004-11-29-ShrCrash.ll

diff --git a/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll b/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll
index 3e5e89d16e4607a79beedfd6f6042b6ce696fefb..f95465cfc5370117a22272de825ace11c24b5dcd 100644 (file)
--- a/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll
+++ b/test/CodeGen/PowerPC/2004-11-29-ShrCrash.ll
@@ -1,6 +1,6 @@
-; RUN: llvm-as < %s | llc -march=ppc32
-
-void %main() {
-       %tr1 = shr uint 1, ubyte 0
+; RUN: llc < %s -march=ppc32
+define void @test() {
+       %tr1 = lshr i32 1, 0            ; <i32> [#uses=0]
        ret void
 }
+