[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / PowerPC / 2006-11-29-AltivecFPSplat.ll

diff --git a/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll b/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll
index d74e47e6b6c1cd57e7cc4bb88038ecd41824631d..61b9967618989895dfe440a749e82bd19d69dd6f 100644 (file)
--- a/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll
+++ b/test/CodeGen/PowerPC/2006-11-29-AltivecFPSplat.ll
@@ -1,10 +1,10 @@
-; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5
+; RUN: llc < %s -march=ppc32 -mcpu=g5
 
-void %glgRunProcessor15() {
-       %tmp26355.i = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000 >, <4 x uint> < uint 0, uint 1, uint 2, uint 7 >          ; <<4 x float>> [#uses=1]
-       %tmp3030030304.i = cast <4 x float> %tmp26355.i to <8 x short>          ; <<8 x short>> [#uses=1]
-       %tmp30305.i = shufflevector <8 x short> zeroinitializer, <8 x short> %tmp3030030304.i, <8 x uint> < uint 1, uint 3, uint 5, uint 7, uint 9, uint 11, uint 13, uint 15 >         ; <<8 x short>> [#uses=1]
-       %tmp30305.i = cast <8 x short> %tmp30305.i to <4 x int>         ; <<4 x int>> [#uses=1]
-       store <4 x int> %tmp30305.i, <4 x int>* null
-       ret void
+define void @glgRunProcessor15() {
+        %tmp26355.i = shufflevector <4 x float> zeroinitializer, <4 x float> < float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000, float 0x379FFFE000000000 >, <4 x i32> < i32 0, i32 1, i32 2, i32 7 >; <<4 x float>> [#uses=1]
+        %tmp3030030304.i = bitcast <4 x float> %tmp26355.i to <8 x i16>         ; <<8 x i16>> [#uses=1]
+        %tmp30305.i = shufflevector <8 x i16> zeroinitializer, <8 x i16> %tmp3030030304.i, <8 x i32> < i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15 >               ; <<8 x i16>> [#uses=1]
+        %tmp30305.i.upgrd.1 = bitcast <8 x i16> %tmp30305.i to <4 x i32>                ; <<4 x i32>> [#uses=1]
+        store <4 x i32> %tmp30305.i.upgrd.1, <4 x i32>* null
+        ret void
 }