Allow copies between GR8_ABCD_L and GR8_ABCD_H.

[oota-llvm.git] / test / CodeGen / PowerPC / addc.ll

diff --git a/test/CodeGen/PowerPC/addc.ll b/test/CodeGen/PowerPC/addc.ll
index 3e6fe2722a14040706a5d48692768a256f61d897..8c928ce8bcad18908054ba59c8f1a7522d5bb13e 100644 (file)
--- a/test/CodeGen/PowerPC/addc.ll
+++ b/test/CodeGen/PowerPC/addc.ll
@@ -1,26 +1,33 @@
 ; All of these should be codegen'd without loading immediates
-; RUN: llvm-as < %s | llc -march=ppc32 -o %t
-; RUN: grep addc %t | count 1
-; RUN: grep adde %t | count 1
-; RUN: grep addze %t | count 1
-; RUN: grep addme %t | count 1
-; RUN: grep addic %t | count 2
+; RUN: llc < %s -mtriple=powerpc-apple-darwin | FileCheck %s
 
-define i64 @add_ll(i64 %a, i64 %b) {
+define i64 @add_ll(i64 %a, i64 %b) nounwind {
 entry:
         %tmp.2 = add i64 %b, %a         ; <i64> [#uses=1]
         ret i64 %tmp.2
+; CHECK: add_ll:
+; CHECK: addc r4, r6, r4
+; CHECK: adde r3, r5, r3
+; CHECK: blr
 }
 
-define i64 @add_l_5(i64 %a) {
+define i64 @add_l_5(i64 %a) nounwind {
 entry:
         %tmp.1 = add i64 %a, 5          ; <i64> [#uses=1]
         ret i64 %tmp.1
+; CHECK: add_l_5:
+; CHECK: addic r4, r4, 5
+; CHECK: addze r3, r3
+; CHECK: blr
 }
 
-define i64 @add_l_m5(i64 %a) {
+define i64 @add_l_m5(i64 %a) nounwind {
 entry:
         %tmp.1 = add i64 %a, -5         ; <i64> [#uses=1]
         ret i64 %tmp.1
+; CHECK: add_l_m5:
+; CHECK: addic r4, r4, -5
+; CHECK: addme r3, r3
+; CHECK: blr
 }