Rework some .ARM.attribute work for improved gcc compatibility.

[oota-llvm.git] / test / CodeGen / PowerPC / and_add.ll

diff --git a/test/CodeGen/PowerPC/and_add.ll b/test/CodeGen/PowerPC/and_add.ll
index dc82fc94402fcb0bf41eacdd0a7fc66c9272f3ea..517e775172c3763253d7faa8540dc5ccad3a2571 100644 (file)
--- a/test/CodeGen/PowerPC/and_add.ll
+++ b/test/CodeGen/PowerPC/and_add.ll
@@ -1,11 +1,15 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep slwi &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep addi &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep rlwinm
+; RUN: llc < %s -march=ppc32 -o %t
+; RUN: grep slwi %t
+; RUN: not grep addi %t
+; RUN: not grep rlwinm %t
 
-int %test(int %A) {
-  %B = mul int %A, 8  ;; shift
-  %C = add int %B, 7  ;; dead, no demanded bits.
-  %D = and int %C, -8 ;; dead once add is gone.
-  ret int %D
+define i32 @test(i32 %A) {
+        ;; shift
+        %B = mul i32 %A, 8              ; <i32> [#uses=1]
+        ;; dead, no demanded bits.
+        %C = add i32 %B, 7              ; <i32> [#uses=1]
+        ;; dead once add is gone.
+        %D = and i32 %C, -8             ; <i32> [#uses=1]
+        ret i32 %D
 }