[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / PowerPC / atomics-indexed.ll

diff --git a/test/CodeGen/PowerPC/atomics-indexed.ll b/test/CodeGen/PowerPC/atomics-indexed.ll
index 910874ee7b154b3c845fdc3de4ae1010951e605d..7a0dde034d68231740d67ce02353daca1c5f9896 100644 (file)
--- a/test/CodeGen/PowerPC/atomics-indexed.ll
+++ b/test/CodeGen/PowerPC/atomics-indexed.ll
@@ -9,19 +9,19 @@
 ; Indexed version of loads
 define i8 @load_x_i8_seq_cst([100000 x i8]* %mem) {
 ; CHECK-LABEL: load_x_i8_seq_cst
-; CHECK: sync 0
+; CHECK: sync
 ; CHECK: lbzx
-; CHECK: sync 1
+; CHECK: lwsync
   %ptr = getelementptr inbounds [100000 x i8], [100000 x i8]* %mem, i64 0, i64 90000
-  %val = load atomic i8* %ptr seq_cst, align 1
+  %val = load atomic i8, i8* %ptr seq_cst, align 1
   ret i8 %val
 }
 define i16 @load_x_i16_acquire([100000 x i16]* %mem) {
 ; CHECK-LABEL: load_x_i16_acquire
 ; CHECK: lhzx
-; CHECK: sync 1
+; CHECK: lwsync
   %ptr = getelementptr inbounds [100000 x i16], [100000 x i16]* %mem, i64 0, i64 90000
-  %val = load atomic i16* %ptr acquire, align 2
+  %val = load atomic i16, i16* %ptr acquire, align 2
   ret i16 %val
 }
 define i32 @load_x_i32_monotonic([100000 x i32]* %mem) {
@@ -29,7 +29,7 @@ define i32 @load_x_i32_monotonic([100000 x i32]* %mem) {
 ; CHECK: lwzx
 ; CHECK-NOT: sync
   %ptr = getelementptr inbounds [100000 x i32], [100000 x i32]* %mem, i64 0, i64 90000
-  %val = load atomic i32* %ptr monotonic, align 4
+  %val = load atomic i32, i32* %ptr monotonic, align 4
   ret i32 %val
 }
 define i64 @load_x_i64_unordered([100000 x i64]* %mem) {
@@ -39,14 +39,14 @@ define i64 @load_x_i64_unordered([100000 x i64]* %mem) {
 ; PPC64: ldx
 ; CHECK-NOT: sync
   %ptr = getelementptr inbounds [100000 x i64], [100000 x i64]* %mem, i64 0, i64 90000
-  %val = load atomic i64* %ptr unordered, align 8
+  %val = load atomic i64, i64* %ptr unordered, align 8
   ret i64 %val
 }
 
 ; Indexed version of stores
 define void @store_x_i8_seq_cst([100000 x i8]* %mem) {
 ; CHECK-LABEL: store_x_i8_seq_cst
-; CHECK: sync 0
+; CHECK: sync
 ; CHECK: stbx
   %ptr = getelementptr inbounds [100000 x i8], [100000 x i8]* %mem, i64 0, i64 90000
   store atomic i8 42, i8* %ptr seq_cst, align 1
@@ -54,7 +54,7 @@ define void @store_x_i8_seq_cst([100000 x i8]* %mem) {
 }
 define void @store_x_i16_release([100000 x i16]* %mem) {
 ; CHECK-LABEL: store_x_i16_release
-; CHECK: sync 1
+; CHECK: lwsync
 ; CHECK: sthx
   %ptr = getelementptr inbounds [100000 x i16], [100000 x i16]* %mem, i64 0, i64 90000
   store atomic i16 42, i16* %ptr release, align 2
@@ -70,8 +70,7 @@ define void @store_x_i32_monotonic([100000 x i32]* %mem) {
 }
 define void @store_x_i64_unordered([100000 x i64]* %mem) {
 ; CHECK-LABEL: store_x_i64_unordered
-; CHECK-NOT: sync 0
-; CHECK-NOT: sync 1
+; CHECK-NOT: sync
 ; PPC32: __sync_
 ; PPC64-NOT: __sync_
 ; PPC64: stdx