[X86] Cleanup nontemporal tests a little. NFC.

[oota-llvm.git] / test / CodeGen / PowerPC / crbits.ll

diff --git a/test/CodeGen/PowerPC/crbits.ll b/test/CodeGen/PowerPC/crbits.ll
index 998e940e8a69be992f304a8ba07ad89faeffe1eb..ab8655c5c8c69ff1f055f2e3bfec73c48eaf9fbd 100644 (file)
--- a/test/CodeGen/PowerPC/crbits.ll
+++ b/test/CodeGen/PowerPC/crbits.ll
@@ -2,10 +2,6 @@
 target datalayout = "E-m:e-i64:64-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
-; FIXME: For a number of these we load (1, 0) for the isel into two registers,
-; whereas if we reverse the condition, we could use only one register (using ZERO
-; for 0 in the isel).
-
 ; Function Attrs: nounwind readnone
 define zeroext i1 @test1(float %v1, float %v2) #0 {
 entry:
@@ -18,12 +14,11 @@ entry:
 ; CHECK-DAG: fcmpu {{[0-9]+}}, 1, 2
 ; CHECK-DAG: li [[REG1:[0-9]+]], 1
 ; CHECK-DAG: lfs [[REG2:[0-9]+]],
-; CHECK-DAG: li [[REG3:[0-9]+]], 0
 ; CHECK-DAG: fcmpu {{[0-9]+}}, 2, [[REG2]]
 ; CHECK: crnor
 ; CHECK: crnor
-; CHECK: crand [[REG4:[0-9]+]],
-; CHECK: isel 3, [[REG1]], [[REG3]], [[REG4]]
+; CHECK: crnand [[REG4:[0-9]+]],
+; CHECK: isel 3, 0, [[REG1]], [[REG4]]
 ; CHECK: blr
 }
 
@@ -39,12 +34,11 @@ entry:
 ; CHECK-DAG: fcmpu {{[0-9]+}}, 1, 2
 ; CHECK-DAG: li [[REG1:[0-9]+]], 1
 ; CHECK-DAG: lfs [[REG2:[0-9]+]],
-; CHECK-DAG: li [[REG3:[0-9]+]], 0
 ; CHECK-DAG: fcmpu {{[0-9]+}}, 2, [[REG2]]
 ; CHECK: crnor
 ; CHECK: crnor
-; CHECK: crxor [[REG4:[0-9]+]],
-; CHECK: isel 3, [[REG1]], [[REG3]], [[REG4]]
+; CHECK: creqv [[REG4:[0-9]+]],
+; CHECK: isel 3, 0, [[REG1]], [[REG4]]
 ; CHECK: blr
 }
 
@@ -62,13 +56,12 @@ entry:
 ; CHECK-DAG: fcmpu {{[0-9]+}}, 1, 2
 ; CHECK-DAG: li [[REG1:[0-9]+]], 1
 ; CHECK-DAG: lfs [[REG2:[0-9]+]],
-; CHECK-DAG: li [[REG3:[0-9]+]], 0
 ; CHECK-DAG: fcmpu {{[0-9]+}}, 2, [[REG2]]
 ; CHECK: crnor
 ; CHECK: crnor
 ; CHECK: crandc
-; CHECK: crxor [[REG4:[0-9]+]],
-; CHECK: isel 3, [[REG1]], [[REG3]], [[REG4]]
+; CHECK: creqv [[REG4:[0-9]+]],
+; CHECK: isel 3, 0, [[REG1]], [[REG4]]
 ; CHECK: blr
 }
 
@@ -96,11 +89,10 @@ entry:
 ; CHECK-LABEL: @test5
 ; CHECK-DAG: and [[REG1:[0-9]+]], 3, 4
 ; CHECK-DAG: cmpwi {{[0-9]+}}, 5, -2
-; CHECK: li [[REG3:[0-9]+]], 1
-; CHECK: andi. {{[0-9]+}}, [[REG1]], 1
-; CHECK: li [[REG4:[0-9]+]], 0
-; CHECK: crorc [[REG5:[0-9]+]],
-; CHECK: isel 3, [[REG3]], [[REG4]], [[REG5]]
+; CHECK-DAG: li [[REG3:[0-9]+]], 1
+; CHECK-DAG: andi. {{[0-9]+}}, [[REG1]], 1
+; CHECK-DAG: crandc [[REG5:[0-9]+]],
+; CHECK: isel 3, 0, [[REG3]], [[REG5]]
 ; CHECK: blr
 }
 
@@ -115,13 +107,12 @@ entry:
 ; CHECK-LABEL: @test6
 ; CHECK-DAG: andi. {{[0-9]+}}, 3, 1
 ; CHECK-DAG: cmpwi {{[0-9]+}}, 5, -2
-; CHECK-DAG: cror [[REG1:[0-9]+]], 1, 1
-; CHECK: andi. {{[0-9]+}}, 4, 1
-; CHECK: li [[REG2:[0-9]+]], 1
-; CHECK: li [[REG3:[0-9]+]], 0
-; CHECK: crorc [[REG4:[0-9]+]], 1,
-; CHECK: crand [[REG5:[0-9]+]], [[REG4]], [[REG1]]
-; CHECK: isel 3, [[REG2]], [[REG3]], [[REG5]]
+; CHECK-DAG: crmove [[REG1:[0-9]+]], 1
+; CHECK-DAG: andi. {{[0-9]+}}, 4, 1
+; CHECK-DAG: li [[REG2:[0-9]+]], 1
+; CHECK-DAG: crorc [[REG4:[0-9]+]], 1,
+; CHECK-DAG: crnand [[REG5:[0-9]+]], [[REG4]], [[REG1]]
+; CHECK: isel 3, 0, [[REG2]], [[REG5]]
 ; CHECK: blr
 }
 
@@ -133,11 +124,39 @@ entry:
 
 ; CHECK-LABEL: @test7
 ; CHECK: andi. {{[0-9]+}}, 3, 1
-; CHECK: isel [[REG1:[0-9]+]], 4, 5, 1
-; CHECK: extsw 3, [[REG1]]
+; CHECK: isel 3, 4, 5, 1
 ; CHECK: blr
 }
 
+define signext i32 @exttest7(i32 signext %a) #0 {
+entry:
+  %cmp = icmp eq i32 %a, 5
+  %cond = select i1 %cmp, i32 7, i32 8
+  ret i32 %cond
+
+; CHECK-LABEL: @exttest7
+; CHECK-DAG: cmplwi {{[0-9]+}}, 3, 5
+; CHECK-DAG: li [[REG1:[0-9]+]], 8
+; CHECK-DAG: li [[REG2:[0-9]+]], 7
+; CHECK: isel 3, [[REG2]], [[REG1]],
+; CHECK-NOT: rldicl
+; CHECK: blr
+}
+
+define zeroext i32 @exttest8() #0 {
+entry:
+  %v0 = load i64, i64* undef, align 8
+  %sub = sub i64 80, %v0
+  %div = lshr i64 %sub, 1
+  %conv13 = trunc i64 %div to i32
+  %cmp14 = icmp ugt i32 %conv13, 80
+  %.conv13 = select i1 %cmp14, i32 0, i32 %conv13
+  ret i32 %.conv13
+; CHECK-LABEL: @exttest8
+; This is a don't-crash test: %conv13 is both one of the possible select output
+; values and also an input to the conditional feeding it.
+}
+
 ; Function Attrs: nounwind readnone
 define float @test8(i1 zeroext %v2, float %v1, float %v3) #0 {
 entry:
@@ -163,10 +182,9 @@ entry:
 ; CHECK-LABEL: @test10
 ; CHECK-DAG: cmpwi {{[0-9]+}}, 3, 0
 ; CHECK-DAG: cmpwi {{[0-9]+}}, 4, 0
-; CHECK-DAG: li [[REG1:[0-9]+]], 0
 ; CHECK-DAG: li [[REG2:[0-9]+]], 1
-; CHECK: crandc [[REG3:[0-9]+]],
-; CHECK: isel 3, [[REG2]], [[REG1]], [[REG3]]
+; CHECK-DAG: crorc [[REG3:[0-9]+]],
+; CHECK: isel 3, 0, [[REG2]], [[REG3]]
 ; CHECK: blr
 }