[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / PowerPC / func-addr.ll

diff --git a/test/CodeGen/PowerPC/func-addr.ll b/test/CodeGen/PowerPC/func-addr.ll
index 0cce863992b6662575c0dda66c88ed7e422e292c..4533c6258a52e173432ba594942515929715b14e 100644 (file)
--- a/test/CodeGen/PowerPC/func-addr.ll
+++ b/test/CodeGen/PowerPC/func-addr.ll
@@ -1,4 +1,5 @@
 ; RUN: llc -mtriple powerpc64-linux < %s | FileCheck %s
+; RUN: llc -O0 -mtriple powerpc64-linux < %s | FileCheck %s
 
 define void @foo()  {
   ret void
@@ -6,15 +7,10 @@ define void @foo()  {
 declare i32 @bar(i8*)
 
 ; CHECK-LABEL: {{^}}zed:
-; CHECK:        addis 3, 2, .LC1@toc@ha
-; CHECK-NEXT:   ld 3, .LC1@toc@l(3)
+; CHECK:        addis 3, 2, foo@toc@ha
+; CHECK-NEXT:   addi 3, 3, foo@toc@l
 ; CHECK-NEXT:   bl bar
 
-
-; CHECK-LABEL: .section        .toc,"aw",@progbits
-; CHECK:       .LC1:
-; CHECK-NEXT:  .tc foo[TC],foo
-
 define  void @zed() {
   call i32 @bar(i8* bitcast (void ()* @foo to i8*))
   ret void