[X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly

[oota-llvm.git] / test / CodeGen / PowerPC / jaggedstructs.ll

diff --git a/test/CodeGen/PowerPC/jaggedstructs.ll b/test/CodeGen/PowerPC/jaggedstructs.ll
index 62aa7cf929f87e0c7a61da2eef0488650587a3cf..9365e581529ab2dda7392a1a227bca730f266187 100644 (file)
--- a/test/CodeGen/PowerPC/jaggedstructs.ll
+++ b/test/CodeGen/PowerPC/jaggedstructs.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=pwr7 -O0 < %s | FileCheck %s
+; RUN: llc -mcpu=ppc64 -O0 -fast-isel=false < %s | FileCheck %s
 
 ; This tests receiving and re-passing parameters consisting of structures
 ; of size 3, 5, 6, and 7.  They are to be found/placed right-adjusted in
@@ -18,27 +18,27 @@ entry:
   ret void
 }
 
-; CHECK: std 6, 216(1)
-; CHECK: std 5, 208(1)
-; CHECK: std 4, 200(1)
-; CHECK: std 3, 192(1)
-; CHECK: lbz {{[0-9]+}}, 199(1)
+; CHECK: std 6, 184(1)
+; CHECK: std 5, 176(1)
+; CHECK: std 4, 168(1)
+; CHECK: std 3, 160(1)
+; CHECK: lbz {{[0-9]+}}, 167(1)
+; CHECK: lhz {{[0-9]+}}, 165(1)
 ; CHECK: stb {{[0-9]+}}, 55(1)
-; CHECK: lhz {{[0-9]+}}, 197(1)
 ; CHECK: sth {{[0-9]+}}, 53(1)
-; CHECK: lbz {{[0-9]+}}, 207(1)
+; CHECK: lbz {{[0-9]+}}, 175(1)
+; CHECK: lwz {{[0-9]+}}, 171(1)
 ; CHECK: stb {{[0-9]+}}, 63(1)
-; CHECK: lwz {{[0-9]+}}, 203(1)
 ; CHECK: stw {{[0-9]+}}, 59(1)
-; CHECK: lhz {{[0-9]+}}, 214(1)
+; CHECK: lhz {{[0-9]+}}, 182(1)
+; CHECK: lwz {{[0-9]+}}, 178(1)
 ; CHECK: sth {{[0-9]+}}, 70(1)
-; CHECK: lwz {{[0-9]+}}, 210(1)
 ; CHECK: stw {{[0-9]+}}, 66(1)
-; CHECK: lbz {{[0-9]+}}, 223(1)
+; CHECK: lbz {{[0-9]+}}, 191(1)
+; CHECK: lhz {{[0-9]+}}, 189(1)
+; CHECK: lwz {{[0-9]+}}, 185(1)
 ; CHECK: stb {{[0-9]+}}, 79(1)
-; CHECK: lhz {{[0-9]+}}, 221(1)
 ; CHECK: sth {{[0-9]+}}, 77(1)
-; CHECK: lwz {{[0-9]+}}, 217(1)
 ; CHECK: stw {{[0-9]+}}, 73(1)
 ; CHECK: ld 6, 72(1)
 ; CHECK: ld 5, 64(1)