[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / PowerPC / misched-inorder-latency.ll

diff --git a/test/CodeGen/PowerPC/misched-inorder-latency.ll b/test/CodeGen/PowerPC/misched-inorder-latency.ll
index b259ff182c0ce0a9c40229b8221963e55ccd93ab..0f57e90abebd52aac0e6ea32b98664dd5cd7e5c1 100644 (file)
--- a/test/CodeGen/PowerPC/misched-inorder-latency.ll
+++ b/test/CodeGen/PowerPC/misched-inorder-latency.ll
@@ -15,13 +15,13 @@ target triple = "powerpc64-bgq-linux"
 define i32 @testload(i32 *%ptr, i32 %sumin) {
 entry:
   %sum1 = add i32 %sumin, 1
-  %val1 = load i32* %ptr
+  %val1 = load i32, i32* %ptr
   %p = icmp eq i32 %sumin, 0
   br i1 %p, label %true, label %end
 true:
   %sum2 = add i32 %sum1, 1
-  %ptr2 = getelementptr i32* %ptr, i32 1
-  %val = load i32* %ptr2
+  %ptr2 = getelementptr i32, i32* %ptr, i32 1
+  %val = load i32, i32* %ptr2
   %val2 = add i32 %val1, %val
   br label %end
 end: