[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / PowerPC / ppc32-cyclecounter.ll

diff --git a/test/CodeGen/PowerPC/ppc32-cyclecounter.ll b/test/CodeGen/PowerPC/ppc32-cyclecounter.ll
index 9e2cd0b12880cc01f6a74a2abf38e211c81a1b5c..ea50a1bdbdc1b83c6096e1f471dde778e8e04d93 100644 (file)
--- a/test/CodeGen/PowerPC/ppc32-cyclecounter.ll
+++ b/test/CodeGen/PowerPC/ppc32-cyclecounter.ll
@@ -13,8 +13,8 @@ entry:
 ; CHECK: mfspr 3, 269
 ; CHECK: mfspr 4, 268
 ; CHECK: mfspr [[REG:[0-9]+]], 269
-; CHECK: cmpw [[CR:[0-9]+]], 3, [[REG]]
-; CHECK: bne [[CR]], .LBB
+; CHECK: cmpw 3, [[REG]]
+; CHECK: bne 0, .LBB
 
 declare i64 @llvm.readcyclecounter()