[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / PowerPC / ppc64-toc.ll

diff --git a/test/CodeGen/PowerPC/ppc64-toc.ll b/test/CodeGen/PowerPC/ppc64-toc.ll
index 5ea2a32ab7841be13dcc4a9e415193e73c3d30d2..7500ed606636a395bab0185a15611a1de59e5db7 100644 (file)
--- a/test/CodeGen/PowerPC/ppc64-toc.ll
+++ b/test/CodeGen/PowerPC/ppc64-toc.ll
@@ -10,11 +10,12 @@ define i64 @access_int64(i64 %a) nounwind readonly {
 entry:
 ; CHECK-LABEL: access_int64:
 ; CHECK-NEXT: .align  3
-; CHECK-NEXT: .quad   .L.access_int64
+; CHECK-NEXT: .quad   .L[[BEGIN:.*]]
 ; CHECK-NEXT: .quad   .TOC.@tocbase
 ; CHECK-NEXT: .quad   0
 ; CHECK-NEXT: .text
-  %0 = load i64* @number64, align 8
+; CHECK-NEXT: .L[[BEGIN]]:
+  %0 = load i64, i64* @number64, align 8
 ; CHECK: ld {{[0-9]+}}, .LC{{[0-9]+}}@toc(2)
   %cmp = icmp eq i64 %0, %a
   %conv1 = zext i1 %cmp to i64 
@@ -25,7 +26,7 @@ define i64 @internal_static_var(i64 %a) nounwind {
 entry:
 ; CHECK-LABEL: internal_static_var:
 ; CHECK: ld {{[0-9]+}}, .LC{{[0-9]+}}@toc(2)
-  %0 = load i64* @internal_static_var.x, align 8
+  %0 = load i64, i64* @internal_static_var.x, align 8
   %cmp = icmp eq i64 %0, %a
   %conv1 = zext i1 %cmp to i64 
   ret i64 %conv1 
@@ -46,7 +47,7 @@ entry:
 ; CHECK-LABEL: access_double_array:
   %idxprom = sext i32 %i to i64
   %arrayidx = getelementptr inbounds [32 x double], [32 x double]* @double_array, i64 0, i64 %idxprom
-  %0 = load double* %arrayidx, align 8
+  %0 = load double, double* %arrayidx, align 8
 ; CHECK: ld {{[0-9]+}}, .LC{{[0-9]+}}@toc(2)
   %cmp = fcmp oeq double %0, %a
   %conv = zext i1 %cmp to i32