[X86] Add support for tbyte memory operand size for Intel-syntax x86 assembly

[oota-llvm.git] / test / CodeGen / PowerPC / ppc64le-localentry.ll

diff --git a/test/CodeGen/PowerPC/ppc64le-localentry.ll b/test/CodeGen/PowerPC/ppc64le-localentry.ll
index 4676ce8eadc6a7d00f3154fe76d1de69fe2a07b0..be64f1151769d0dc7e0f94724e84ed7d1e7b93d7 100644 (file)
--- a/test/CodeGen/PowerPC/ppc64le-localentry.ll
+++ b/test/CodeGen/PowerPC/ppc64le-localentry.ll
@@ -1,5 +1,10 @@
 ; RUN: llc -march=ppc64le -mcpu=pwr8 < %s | FileCheck %s
 ; RUN: llc -march=ppc64le -mcpu=pwr8 -O0 < %s | FileCheck %s
+; RUN: llc -march=ppc64le < %s | FileCheck %s
+; RUN: llc -march=ppc64le -O0 < %s | FileCheck %s
+
+; The second run of the test case is to ensure the behaviour is the same
+; without specifying -mcpu=pwr8 as that is now the baseline for ppc64le.
 
 target datalayout = "e-m:e-i64:64-n32:64"
 target triple = "powerpc64le-unknown-linux-gnu"
@@ -11,13 +16,14 @@ target triple = "powerpc64le-unknown-linux-gnu"
 define i64 @use_toc(i64 %a) nounwind {
 entry:
 ; CHECK-LABEL: @use_toc
+; CHECK-NEXT: .L{{.*}}:
 ; CHECK-NEXT: .Ltmp[[TMP1:[0-9]+]]:
 ; CHECK-NEXT: addis 2, 12, .TOC.-.Ltmp[[TMP1]]@ha
 ; CHECK-NEXT: addi 2, 2, .TOC.-.Ltmp[[TMP1]]@l
 ; CHECK-NEXT: .Ltmp[[TMP2:[0-9]+]]:
 ; CHECK-NEXT: .localentry use_toc, .Ltmp[[TMP2]]-.Ltmp[[TMP1]]
 ; CHECK-NEXT: %entry
-  %0 = load i64* @number64, align 8
+  %0 = load i64, i64* @number64, align 8
   %cmp = icmp eq i64 %0, %a
   %conv1 = zext i1 %cmp to i64
   ret i64 %conv1
@@ -27,6 +33,7 @@ declare void @callee()
 define void @use_toc_implicit() nounwind {
 entry:
 ; CHECK-LABEL: @use_toc_implicit
+; CHECK-NEXT: .L{{.*}}:
 ; CHECK-NEXT: .Ltmp[[TMP1:[0-9]+]]:
 ; CHECK-NEXT: addis 2, 12, .TOC.-.Ltmp[[TMP1]]@ha
 ; CHECK-NEXT: addi 2, 2, .TOC.-.Ltmp[[TMP1]]@l
@@ -40,6 +47,7 @@ entry:
 define i64 @no_toc(i64 %a) nounwind {
 entry:
 ; CHECK-LABEL: @no_toc
+; CHECK-NEXT: .L{{.*}}:
 ; CHECK-NEXT: %entry
   ret i64 %a
 }