[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / PowerPC / rlwimi-commute.ll

diff --git a/test/CodeGen/PowerPC/rlwimi-commute.ll b/test/CodeGen/PowerPC/rlwimi-commute.ll
index 4b2b07f33504c736d4ad5cebb2b94c9b2b1ea73a..cd0f49ed7807fe4c49c96fc15a9a6945e119e8a2 100644 (file)
--- a/test/CodeGen/PowerPC/rlwimi-commute.ll
+++ b/test/CodeGen/PowerPC/rlwimi-commute.ll
@@ -1,26 +1,34 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwimi &&
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep 'or '
+; RUN: llc < %s -march=ppc32 | grep rlwimi
+; RUN: llc < %s -march=ppc32 | not grep "or "
 
 ; Make sure there is no register-register copies here.
 
-void %test1(int *%A, int *%B, int *%D, int* %E) {
-       %A = load int* %A
-       %B = load int* %B
-       %X = and int %A, 15
-       %Y = and int %B, -16
-       %Z = or int %X, %Y
-       store int %Z, int* %D
-       store int %A, int* %E
+define void @test1(i32* %A, i32* %B, i32* %D, i32* %E) {
+       %A.upgrd.1 = load i32, i32* %A          ; <i32> [#uses=2]
+       %B.upgrd.2 = load i32, i32* %B          ; <i32> [#uses=1]
+       %X = and i32 %A.upgrd.1, 15             ; <i32> [#uses=1]
+       %Y = and i32 %B.upgrd.2, -16            ; <i32> [#uses=1]
+       %Z = or i32 %X, %Y              ; <i32> [#uses=1]
+       store i32 %Z, i32* %D
+       store i32 %A.upgrd.1, i32* %E
        ret void
 }
 
-void %test2(int *%A, int *%B, int *%D, int* %E) {
-       %A = load int* %A
-       %B = load int* %B
-       %X = and int %A, 15
-       %Y = and int %B, -16
-       %Z = or int %X, %Y
-       store int %Z, int* %D
-       store int %B, int* %E
+define void @test2(i32* %A, i32* %B, i32* %D, i32* %E) {
+       %A.upgrd.3 = load i32, i32* %A          ; <i32> [#uses=1]
+       %B.upgrd.4 = load i32, i32* %B          ; <i32> [#uses=2]
+       %X = and i32 %A.upgrd.3, 15             ; <i32> [#uses=1]
+       %Y = and i32 %B.upgrd.4, -16            ; <i32> [#uses=1]
+       %Z = or i32 %X, %Y              ; <i32> [#uses=1]
+       store i32 %Z, i32* %D
+       store i32 %B.upgrd.4, i32* %E
        ret void
 }
+
+define i32 @test3(i32 %a, i32 %b) {
+       %tmp.1 = and i32 %a, 15         ; <i32> [#uses=1]
+       %tmp.3 = and i32 %b, 240                ; <i32> [#uses=1]
+       %tmp.4 = or i32 %tmp.3, %tmp.1          ; <i32> [#uses=1]
+       ret i32 %tmp.4
+}
+