[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / PowerPC / rlwimi-commute.ll

diff --git a/test/CodeGen/PowerPC/rlwimi-commute.ll b/test/CodeGen/PowerPC/rlwimi-commute.ll
index 6410c63234d2ecdbb773370c678c34727f704ce7..cd0f49ed7807fe4c49c96fc15a9a6945e119e8a2 100644 (file)
--- a/test/CodeGen/PowerPC/rlwimi-commute.ll
+++ b/test/CodeGen/PowerPC/rlwimi-commute.ll
@@ -1,11 +1,11 @@
 ; RUN: llc < %s -march=ppc32 | grep rlwimi
-; RUN: llc < %s -march=ppc32 | not grep {or }
+; RUN: llc < %s -march=ppc32 | not grep "or "
 
 ; Make sure there is no register-register copies here.
 
 define void @test1(i32* %A, i32* %B, i32* %D, i32* %E) {
-       %A.upgrd.1 = load i32* %A               ; <i32> [#uses=2]
-       %B.upgrd.2 = load i32* %B               ; <i32> [#uses=1]
+       %A.upgrd.1 = load i32, i32* %A          ; <i32> [#uses=2]
+       %B.upgrd.2 = load i32, i32* %B          ; <i32> [#uses=1]
        %X = and i32 %A.upgrd.1, 15             ; <i32> [#uses=1]
        %Y = and i32 %B.upgrd.2, -16            ; <i32> [#uses=1]
        %Z = or i32 %X, %Y              ; <i32> [#uses=1]
@@ -15,8 +15,8 @@ define void @test1(i32* %A, i32* %B, i32* %D, i32* %E) {
 }
 
 define void @test2(i32* %A, i32* %B, i32* %D, i32* %E) {
-       %A.upgrd.3 = load i32* %A               ; <i32> [#uses=1]
-       %B.upgrd.4 = load i32* %B               ; <i32> [#uses=2]
+       %A.upgrd.3 = load i32, i32* %A          ; <i32> [#uses=1]
+       %B.upgrd.4 = load i32, i32* %B          ; <i32> [#uses=2]
        %X = and i32 %A.upgrd.3, 15             ; <i32> [#uses=1]
        %Y = and i32 %B.upgrd.4, -16            ; <i32> [#uses=1]
        %Z = or i32 %X, %Y              ; <i32> [#uses=1]