[ARM] Mark VMOV with immediate: isAsCheapAsMove.

[oota-llvm.git] / test / CodeGen / PowerPC / rlwinm.ll

diff --git a/test/CodeGen/PowerPC/rlwinm.ll b/test/CodeGen/PowerPC/rlwinm.ll
index 45f26d77dd8d522be86adfe9ab1328aeeb914c67..699f6e78356e7ad53fee089b10d1f051be8853fb 100644 (file)
--- a/test/CodeGen/PowerPC/rlwinm.ll
+++ b/test/CodeGen/PowerPC/rlwinm.ll
@@ -1,63 +1,61 @@
 ; All of these ands and shifts should be folded into rlwimi's
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep and && 
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep srawi && 
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep srwi && 
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | not grep slwi && 
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=ppc32 | grep rlwinm | wc -l | grep 8
+; RUN: llc < %s -march=ppc32 -o %t
+; RUN: not grep and %t
+; RUN: not grep srawi %t
+; RUN: not grep srwi %t
+; RUN: not grep slwi %t
+; RUN: grep rlwinm %t | count 8
 
-implementation   ; Functions:
-
-int %test1(int %a) {
+define i32 @test1(i32 %a) {
 entry:
-        %tmp.1 = and int %a, 268431360          ; <int> [#uses=1]
-        ret int %tmp.1
+       %tmp.1 = and i32 %a, 268431360          ; <i32> [#uses=1]
+       ret i32 %tmp.1
 }
 
-int %test2(int %a) {
+define i32 @test2(i32 %a) {
 entry:
-        %tmp.1 = and int %a, -268435441         ; <int> [#uses=1]
-        ret int %tmp.1
+       %tmp.1 = and i32 %a, -268435441         ; <i32> [#uses=1]
+       ret i32 %tmp.1
 }
 
-int %test3(int %a) {
+define i32 @test3(i32 %a) {
 entry:
-        %tmp.2 = shr int %a, ubyte 8            ; <int> [#uses=1]
-        %tmp.3 = and int %tmp.2, 255            ; <int> [#uses=1]
-        ret int %tmp.3
+       %tmp.2 = ashr i32 %a, 8         ; <i32> [#uses=1]
+       %tmp.3 = and i32 %tmp.2, 255            ; <i32> [#uses=1]
+       ret i32 %tmp.3
 }
 
-uint %test4(uint %a) {
+define i32 @test4(i32 %a) {
 entry:
-        %tmp.3 = shr uint %a, ubyte 8           ; <uint> [#uses=1]
-        %tmp.4 = and uint %tmp.3, 255           ; <uint> [#uses=1]
-        ret uint %tmp.4
+       %tmp.3 = lshr i32 %a, 8         ; <i32> [#uses=1]
+       %tmp.4 = and i32 %tmp.3, 255            ; <i32> [#uses=1]
+       ret i32 %tmp.4
 }
 
-int %test5(int %a) {
+define i32 @test5(i32 %a) {
 entry:
-        %tmp.2 = shl int %a, ubyte 8            ; <int> [#uses=1]
-        %tmp.3 = and int %tmp.2, -8388608       ; <int> [#uses=1]
-        ret int %tmp.3
+       %tmp.2 = shl i32 %a, 8          ; <i32> [#uses=1]
+       %tmp.3 = and i32 %tmp.2, -8388608               ; <i32> [#uses=1]
+       ret i32 %tmp.3
 }
 
-int %test6(int %a) {
+define i32 @test6(i32 %a) {
 entry:
-        %tmp.1 = and int %a, 65280               ; <int> [#uses=1]
-        %tmp.2 = shr int %tmp.1, ubyte 8         ; <uint> [#uses=1]
-        ret int %tmp.2
+       %tmp.1 = and i32 %a, 65280              ; <i32> [#uses=1]
+       %tmp.2 = ashr i32 %tmp.1, 8             ; <i32> [#uses=1]
+       ret i32 %tmp.2
 }
 
-uint %test7(uint %a) {
+define i32 @test7(i32 %a) {
 entry:
-        %tmp.1 = and uint %a, 65280              ; <uint> [#uses=1]
-        %tmp.2 = shr uint %tmp.1, ubyte 8        ; <uint> [#uses=1]
-        ret uint %tmp.2
+       %tmp.1 = and i32 %a, 65280              ; <i32> [#uses=1]
+       %tmp.2 = lshr i32 %tmp.1, 8             ; <i32> [#uses=1]
+       ret i32 %tmp.2
 }
 
-int %test8(int %a) {
+define i32 @test8(i32 %a) {
 entry:
-        %tmp.1 = and int %a, 16711680            ; <int> [#uses=1]
-        %tmp.2 = shl int %tmp.1, ubyte 8         ; <int> [#uses=1]
-        ret int %tmp.2
+       %tmp.1 = and i32 %a, 16711680           ; <i32> [#uses=1]
+       %tmp.2 = shl i32 %tmp.1, 8              ; <i32> [#uses=1]
+       ret i32 %tmp.2
 }
-