[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / PowerPC / rotl.ll

diff --git a/test/CodeGen/PowerPC/rotl.ll b/test/CodeGen/PowerPC/rotl.ll
index aa033cfc455d1c8b489882ac2f625b16f2e87f1c..671f524645a74d0d996da7d627e5fb5604e6f62e 100644 (file)
--- a/test/CodeGen/PowerPC/rotl.ll
+++ b/test/CodeGen/PowerPC/rotl.ll
@@ -1,5 +1,7 @@
-; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwnm  | wc -l | grep 2
-; RUN: llvm-as < %s | llc -march=ppc32 | grep rlwinm | wc -l | grep 2
+; RUN: llc < %s -march=ppc32 | grep rotrw: | count 1
+; RUN: llc < %s -march=ppc32 | grep rotlw: | count 1
+; RUN: llc < %s -march=ppc32 | grep rotlwi: | count 1
+; RUN: llc < %s -march=ppc32 | grep rotrwi: | count 1
 
 define i32 @rotlw(i32 %x, i32 %sh) {
 entry: