[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / PowerPC / shl_sext.ll

diff --git a/test/CodeGen/PowerPC/shl_sext.ll b/test/CodeGen/PowerPC/shl_sext.ll
index 95ec2d29f62a28e78a85da4786751f08dad938e2..1f35eb4c55a6e8578b12b834f43f2d9d54993a1c 100644 (file)
--- a/test/CodeGen/PowerPC/shl_sext.ll
+++ b/test/CodeGen/PowerPC/shl_sext.ll
@@ -1,9 +1,18 @@
 ; This test should not contain a sign extend
-; RUN: llvm-as < %s | llc -march=ppc32 | not grep extsb 
+; RUN: llc < %s -march=ppc32 | not grep extsb 
 
-int %test(uint %mode.0.i.0) {
-        %tmp.79 = cast uint %mode.0.i.0 to sbyte        ; <sbyte> [#uses=1]
-        %tmp.80 = cast sbyte %tmp.79 to int             ; <int> [#uses=1]
-        %tmp.81 = shl int %tmp.80, ubyte 24             ; <int> [#uses=1]
-        ret int %tmp.81
+define i32 @test(i32 %mode.0.i.0) {
+        %tmp.79 = trunc i32 %mode.0.i.0 to i8           ; <i8> [#uses=1]
+        %tmp.80 = sext i8 %tmp.79 to i32                ; <i32> [#uses=1]
+        %tmp.81 = shl i32 %tmp.80, 24           ; <i32> [#uses=1]
+        ret i32 %tmp.81
 }
+
+define i32 @test2(i32 %mode.0.i.0) {
+        %tmp.79 = trunc i32 %mode.0.i.0 to i8           ; <i8> [#uses=1]
+        %tmp.80 = sext i8 %tmp.79 to i32                ; <i32> [#uses=1]
+        %tmp.81 = shl i32 %tmp.80, 16           ; <i32> [#uses=1]
+        %tmp.82 = and i32 %tmp.81, 16711680             ; <i32> [#uses=1]
+        ret i32 %tmp.82
+}
+