[Hexagon] Use A2_tfrsi for constant pool and jump table addresses

[oota-llvm.git] / test / CodeGen / PowerPC / vec_conv.ll

diff --git a/test/CodeGen/PowerPC/vec_conv.ll b/test/CodeGen/PowerPC/vec_conv.ll
index a475e9499df228679f3ead50653d85ca97653fb3..6e19f5a010d24d5eab12f1e1a2af6efee669948c 100644 (file)
--- a/test/CodeGen/PowerPC/vec_conv.ll
+++ b/test/CodeGen/PowerPC/vec_conv.ll
@@ -11,47 +11,47 @@ target triple = "powerpc64-unknown-linux-gnu"
 
 define void @v4f32_to_v4i32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind {
 entry:
-  %0 = load <4 x float>* @cte_float, align 16
+  %0 = load <4 x float>, <4 x float>* @cte_float, align 16
   %mul = fmul <4 x float> %0, %x
   %1 = fptosi <4 x float> %mul to <4 x i32>
   store <4 x i32> %1, <4 x i32>* %y, align 16
   ret void
 }
-;CHECK: v4f32_to_v4i32:
+;CHECK-LABEL: v4f32_to_v4i32:
 ;CHECK: vctsxs {{[0-9]+}}, {{[0-9]+}}, 0
 
 
 define void @v4f32_to_v4u32(<4 x float> %x, <4 x i32>* nocapture %y) nounwind {
 entry:
-  %0 = load <4 x float>* @cte_float, align 16
+  %0 = load <4 x float>, <4 x float>* @cte_float, align 16
   %mul = fmul <4 x float> %0, %x
   %1 = fptoui <4 x float> %mul to <4 x i32>
   store <4 x i32> %1, <4 x i32>* %y, align 16
   ret void
 }
-;CHECK: v4f32_to_v4u32:
+;CHECK-LABEL: v4f32_to_v4u32:
 ;CHECK: vctuxs {{[0-9]+}}, {{[0-9]+}}, 0
 
 
 define void @v4i32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind {
 entry:
-  %0 = load <4 x i32>* @cte_int, align 16
+  %0 = load <4 x i32>, <4 x i32>* @cte_int, align 16
   %mul = mul <4 x i32> %0, %x
   %1 = sitofp <4 x i32> %mul to <4 x float>
   store <4 x float> %1, <4 x float>* %y, align 16
   ret void
 }
-;CHECK: v4i32_to_v4f32:
+;CHECK-LABEL: v4i32_to_v4f32:
 ;CHECK: vcfsx {{[0-9]+}}, {{[0-9]+}}, 0
 
 
 define void @v4u32_to_v4f32(<4 x i32> %x, <4 x float>* nocapture %y) nounwind {
 entry:
-  %0 = load <4 x i32>* @cte_int, align 16
+  %0 = load <4 x i32>, <4 x i32>* @cte_int, align 16
   %mul = mul <4 x i32> %0, %x
   %1 = uitofp <4 x i32> %mul to <4 x float>
   store <4 x float> %1, <4 x float>* %y, align 16
   ret void
 }
-;CHECK: v4u32_to_v4f32:
+;CHECK-LABEL: v4u32_to_v4f32:
 ;CHECK: vcfux {{[0-9]+}}, {{[0-9]+}}, 0