[PowerPC] Fix the PPCInstrInfo::getInstrLatency implementation

[oota-llvm.git] / test / CodeGen / PowerPC / vrsave-spill.ll

diff --git a/test/CodeGen/PowerPC/vrsave-spill.ll b/test/CodeGen/PowerPC/vrsave-spill.ll
index d4b07bc1f6e6938f82a5252e1bda3e25f2af6e6b..c73206d8fc86c18d37d98a047c37ac9d30e3e51b 100644 (file)
--- a/test/CodeGen/PowerPC/vrsave-spill.ll
+++ b/test/CodeGen/PowerPC/vrsave-spill.ll
@@ -1,18 +1,19 @@
-; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s
+; RUN: llc < %s -mtriple=powerpc64-apple-darwin -mcpu=g5 | FileCheck %s
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
-target triple = "powerpc64-unknown-linux-gnu"
+target triple = "powerpc64-apple-darwin"
 
 define <4 x float> @foo(<4 x float> %a, <4 x float> %b) nounwind {
 entry:
   %c = fadd <4 x float> %a, %b
+  %d = fmul <4 x float> %c, %a
   call void asm sideeffect "", "~{VRsave}"() nounwind
   br label %return
 
 ; CHECK: @foo
-; CHECK: mfspr {{[0-9]+}}, 256
-; CHECK: mtspr 256, {{[0-9]+}}
+; CHECK: mfspr r{{[0-9]+}}, 256
+; CHECK: mtspr 256, r{{[0-9]+}}
 
 return:                                           ; preds = %entry
-  ret <4 x float> %c
+  ret <4 x float> %d
 }