Fix a typo, in a comment, in a test.

[oota-llvm.git] / test / CodeGen / R600 / fabs.ll

diff --git a/test/CodeGen/R600/fabs.ll b/test/CodeGen/R600/fabs.ll
index 0407533eaa5f475b722389f376062fdc23535e25..d318c42e2f6a497767848a8198e9aef731956138 100644 (file)
--- a/test/CodeGen/R600/fabs.ll
+++ b/test/CodeGen/R600/fabs.ll
@@ -1,16 +1,22 @@
-;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
+; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=R600-CHECK
+; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s --check-prefix=SI-CHECK
 
-;CHECK: MOV T{{[0-9]+\.[XYZW], \|T[0-9]+\.[XYZW]\|}}
+; DAGCombiner will transform:
+; (fabs (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF))
+; unless isFabsFree returns true
 
-define void @test() {
-   %r0 = call float @llvm.R600.load.input(i32 0)
-   %r1 = call float @fabs( float %r0)
-   call void @llvm.AMDGPU.store.output(float %r1, i32 0)
-   ret void
-}
-
-declare float @llvm.R600.load.input(i32) readnone
+; R600-CHECK: @fabs_free
+; R600-CHECK-NOT: AND
+; R600-CHECK: |PV.{{[XYZW]}}|
+; SI-CHECK: @fabs_free
+; SI-CHECK: V_ADD_F32_e64 VGPR{{[0-9]}}, SGPR{{[0-9]}}, 0, 1, 0, 0, 0
 
-declare void @llvm.AMDGPU.store.output(float, i32)
+define void @fabs_free(float addrspace(1)* %out, i32 %in) {
+entry:
+  %0 = bitcast i32 %in to float
+  %1 = call float @fabs(float %0)
+  store float %1, float addrspace(1)* %out
+  ret void
+}
 
 declare float @fabs(float ) readnone