Remove the 'N' modifier from llvm-ar.

[oota-llvm.git] / test / CodeGen / R600 / rotr.ll

diff --git a/test/CodeGen/R600/rotr.ll b/test/CodeGen/R600/rotr.ll
index 75232fee71a35cc2e335b22e9b2589b396fb9927..960d30d6302471e447d207f18c63787e3670e5a6 100644 (file)
--- a/test/CodeGen/R600/rotr.ll
+++ b/test/CodeGen/R600/rotr.ll
@@ -1,8 +1,11 @@
-; RUN: llc < %s -debug-only=isel -march=r600 -mcpu=redwood -o - 2>&1 | FileCheck %s
+; RUN: llc < %s -march=r600 -mcpu=redwood -o - | FileCheck --check-prefix=R600-CHECK %s
+; RUN: llc < %s -march=r600 -mcpu=SI -o - | FileCheck --check-prefix=SI-CHECK %s
 
-; CHECK: rotr
-; CHECK: @rotr
-; CHECK: BIT_ALIGN_INT
+; R600-CHECK: @rotr
+; R600-CHECK: BIT_ALIGN_INT
+
+; SI-CHECK: @rotr
+; SI-CHECK: V_ALIGNBIT_B32
 define void @rotr(i32 addrspace(1)* %in, i32 %x, i32 %y) {
 entry:
   %0 = sub i32 32, %y
@@ -13,11 +16,14 @@ entry:
   ret void
 }
 
-; CHECK: rotr
-; CHECK: @rotl
-; CHECK: SUB_INT {{\** T[0-9]+\.[XYZW]}}, literal.x
-; CHECK-NEXT: 32
-; CHECK: BIT_ALIGN_INT {{\** T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], PV.[xyzw]}}
+; R600-CHECK: @rotl
+; R600-CHECK: SUB_INT {{\** T[0-9]+\.[XYZW]}}, literal.x
+; R600-CHECK-NEXT: 32
+; R600-CHECK: BIT_ALIGN_INT {{\** T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], PV.[XYZW]}}
+
+; SI-CHECK: @rotl
+; SI-CHECK: V_SUB_I32_e64 [[DST:VGPR[0-9]+]], 32, {{[SV]GPR[0-9]+}}
+; SI-CHECK: V_ALIGNBIT_B32 {{VGPR[0-9]+, [SV]GPR[0-9]+, VGPR[0-9]+}}, [[DST]]
 define void @rotl(i32 addrspace(1)* %in, i32 %x, i32 %y) {
 entry:
   %0 = shl i32 %x, %y