[SparcV9] Use separate instruction patterns for 64 bit arithmetic instructions instea...

[oota-llvm.git] / test / CodeGen / SPARC / 2011-01-19-DelaySlot.ll

diff --git a/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
index b39c355fbdcdf3aa2562b0980fb0e311d7eb1abb..c71e7c00b9165b5ce480a7e2a45ad555500b2676 100644 (file)
--- a/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
+++ b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
@@ -54,12 +54,12 @@ bb5:                                              ; preds = %bb, %entry
 
 define i32 @test_inlineasm(i32 %a) nounwind {
 entry:
-;CHECK:      test_inlineasm
+;CHECK-LABEL:      test_inlineasm:
 ;CHECK:      sethi
 ;CHECK:      !NO_APP
 ;CHECK-NEXT: cmp
 ;CHECK-NEXT: bg
-;CHECK-NEXT: nop
+;CHECK-NEXT: or
   tail call void asm sideeffect "sethi 0, %g0", ""() nounwind
   %0 = icmp slt i32 %a, 0
   br i1 %0, label %bb, label %bb1
@@ -80,7 +80,7 @@ declare i32 @bar(i32)
 
 define i32 @test_implicit_def() nounwind {
 entry:
-;UNOPT:       test_implicit_def
+;UNOPT-LABEL:       test_implicit_def:
 ;UNOPT:       call func
 ;UNOPT-NEXT:  nop
   %0 = tail call i32 @func(i32* undef) nounwind
@@ -89,7 +89,7 @@ entry:
 
 define i32 @prevent_o7_in_call_delay_slot(i32 %i0) {
 entry:
-;CHECK:       prevent_o7_in_call_delay_slot
+;CHECK-LABEL:       prevent_o7_in_call_delay_slot:
 ;CHECK:       add %i0, 2, %o5
 ;CHECK:       add %i0, 3, %o7
 ;CHECK:       add %o5, %o7, %o0
@@ -109,7 +109,7 @@ declare i32 @func(i32*)
 
 define i32 @restore_add(i32 %a, i32 %b) {
 entry:
-;CHECK:  restore_add:
+;CHECK-LABEL:  restore_add:
 ;CHECK:  jmp %i7+8
 ;CHECK:  restore %o0, %i1, %o0
   %0 = tail call i32 @bar(i32 %a) nounwind
@@ -119,7 +119,7 @@ entry:
 
 define i32 @restore_add_imm(i32 %a) {
 entry:
-;CHECK:  restore_add_imm:
+;CHECK-LABEL:  restore_add_imm:
 ;CHECK:  jmp %i7+8
 ;CHECK:  restore %o0, 20, %o0
   %0 = tail call i32 @bar(i32 %a) nounwind
@@ -129,7 +129,7 @@ entry:
 
 define i32 @restore_or(i32 %a) {
 entry:
-;CHECK:  restore_or:
+;CHECK-LABEL:  restore_or:
 ;CHECK:  jmp %i7+8
 ;CHECK:  restore %g0, %o0, %o0
   %0 = tail call i32 @bar(i32 %a) nounwind
@@ -138,7 +138,7 @@ entry:
 
 define i32 @restore_or_imm(i32 %a) {
 entry:
-;CHECK:  restore_or_imm:
+;CHECK-LABEL:  restore_or_imm:
 ;CHECK:  or %o0, 20, %i0
 ;CHECK:  jmp %i7+8
 ;CHECK:  restore %g0, %g0, %g0
@@ -150,7 +150,7 @@ entry:
 
 define i32 @restore_sethi(i32 %a) {
 entry:
-;CHECK: restore_sethi
+;CHECK-LABEL: restore_sethi:
 ;CHECK-NOT: sethi  3
 ;CHECK: restore %g0, 3072, %o0
   %0 = tail call i32 @bar(i32 %a) nounwind
@@ -161,7 +161,7 @@ entry:
 
 define i32 @restore_sethi_3bit(i32 %a) {
 entry:
-;CHECK: restore_sethi
+;CHECK-LABEL: restore_sethi_3bit:
 ;CHECK: sethi  6
 ;CHECK-NOT: restore %g0, 6144, %o0
   %0 = tail call i32 @bar(i32 %a) nounwind
@@ -172,7 +172,7 @@ entry:
 
 define i32 @restore_sethi_large(i32 %a) {
 entry:
-;CHECK: restore_sethi
+;CHECK-LABEL: restore_sethi_large:
 ;CHECK: sethi  4000, %i0
 ;CHECK: restore %g0, %g0, %g0
   %0 = tail call i32 @bar(i32 %a) nounwind