[mips][msa] Correct pattern for LSA

[oota-llvm.git] / test / CodeGen / SystemZ / cond-move-01.ll

diff --git a/test/CodeGen/SystemZ/cond-move-01.ll b/test/CodeGen/SystemZ/cond-move-01.ll
index 3ddc820dc1be4cb97da6bf9029ec8502e4ef2126..088dee0232ea77ce13dbe9be74227f42d0174bb2 100644 (file)
--- a/test/CodeGen/SystemZ/cond-move-01.ll
+++ b/test/CodeGen/SystemZ/cond-move-01.ll
@@ -6,7 +6,7 @@
 define i32 @f1(i32 %a, i32 %b, i32 %limit) {
 ; CHECK-LABEL: f1:
 ; CHECK: clfi %r4, 42
-; CHECK: locrnl %r2, %r3
+; CHECK: locrhe %r2, %r3
 ; CHECK: br %r14
   %cond = icmp ult i32 %limit, 42
   %res = select i1 %cond, i32 %a, i32 %b
@@ -17,9 +17,32 @@ define i32 @f1(i32 %a, i32 %b, i32 %limit) {
 define i64 @f2(i64 %a, i64 %b, i64 %limit) {
 ; CHECK-LABEL: f2:
 ; CHECK: clgfi %r4, 42
-; CHECK: locgrnl %r2, %r3
+; CHECK: locgrhe %r2, %r3
 ; CHECK: br %r14
   %cond = icmp ult i64 %limit, 42
   %res = select i1 %cond, i64 %a, i64 %b
   ret i64 %res
 }
+
+; Test LOCR in a case that could use COMPARE AND BRANCH.  We prefer using
+; LOCR if possible.
+define i32 @f3(i32 %a, i32 %b, i32 %limit) {
+; CHECK-LABEL: f3:
+; CHECK: chi %r4, 42
+; CHECK: locrlh %r2, %r3
+; CHECK: br %r14
+  %cond = icmp eq i32 %limit, 42
+  %res = select i1 %cond, i32 %a, i32 %b
+  ret i32 %res
+}
+
+; ...and again for LOCGR.
+define i64 @f4(i64 %a, i64 %b, i64 %limit) {
+; CHECK-LABEL: f4:
+; CHECK: cghi %r4, 42
+; CHECK: locgrlh %r2, %r3
+; CHECK: br %r14
+  %cond = icmp eq i64 %limit, 42
+  %res = select i1 %cond, i64 %a, i64 %b
+  ret i64 %res
+}