Bitcasts between FP and INT values using direct moves

[oota-llvm.git] / test / CodeGen / SystemZ / int-cmp-39.ll

diff --git a/test/CodeGen/SystemZ/int-cmp-39.ll b/test/CodeGen/SystemZ/int-cmp-39.ll
index e99b240af8a6d8ce67666a7a4aa1e7def728daf1..5e3abceeca4599af777c063c57290b7738164290 100644 (file)
--- a/test/CodeGen/SystemZ/int-cmp-39.ll
+++ b/test/CodeGen/SystemZ/int-cmp-39.ll
@@ -8,12 +8,12 @@
 
 ; Check signed comparison.
 define i64 @f1(i64 %src1) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
 ; CHECK: cghrl %r2, g
 ; CHECK-NEXT: jl
 ; CHECK: br %r14
 entry:
-  %val = load i16 *@g
+  %val = load i16 , i16 *@g
   %src2 = sext i16 %val to i64
   %cond = icmp slt i64 %src1, %src2
   br i1 %cond, label %exit, label %mulb
@@ -27,11 +27,11 @@ exit:
 
 ; Check unsigned comparison, which cannot use CHRL.
 define i64 @f2(i64 %src1) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
 ; CHECK-NOT: cghrl
 ; CHECK: br %r14
 entry:
-  %val = load i16 *@g
+  %val = load i16 , i16 *@g
   %src2 = sext i16 %val to i64
   %cond = icmp ult i64 %src1, %src2
   br i1 %cond, label %exit, label %mulb
@@ -45,12 +45,12 @@ exit:
 
 ; Check equality.
 define i64 @f3(i64 %src1) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
 ; CHECK: cghrl %r2, g
 ; CHECK-NEXT: je
 ; CHECK: br %r14
 entry:
-  %val = load i16 *@g
+  %val = load i16 , i16 *@g
   %src2 = sext i16 %val to i64
   %cond = icmp eq i64 %src1, %src2
   br i1 %cond, label %exit, label %mulb
@@ -64,12 +64,12 @@ exit:
 
 ; Check inequality.
 define i64 @f4(i64 %src1) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
 ; CHECK: cghrl %r2, g
 ; CHECK-NEXT: jlh
 ; CHECK: br %r14
 entry:
-  %val = load i16 *@g
+  %val = load i16 , i16 *@g
   %src2 = sext i16 %val to i64
   %cond = icmp ne i64 %src1, %src2
   br i1 %cond, label %exit, label %mulb
@@ -83,13 +83,13 @@ exit:
 
 ; Repeat f1 with an unaligned address.
 define i64 @f5(i64 %src1) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
 ; CHECK: lgrl [[REG:%r[0-5]]], h@GOT
 ; CHECK: cgh %r2, 0([[REG]])
 ; CHECK-NEXT: jl
 ; CHECK: br %r14
 entry:
-  %val = load i16 *@h, align 1
+  %val = load i16 , i16 *@h, align 1
   %src2 = sext i16 %val to i64
   %cond = icmp slt i64 %src1, %src2
   br i1 %cond, label %exit, label %mulb
@@ -100,3 +100,22 @@ exit:
   %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
   ret i64 %res
 }
+
+; Check the comparison can be reversed if that allows CGHRL to be used.
+define i64 @f6(i64 %src2) {
+; CHECK-LABEL: f6:
+; CHECK: cghrl %r2, g
+; CHECK-NEXT: jh {{\.L.*}}
+; CHECK: br %r14
+entry:
+  %val = load i16 , i16 *@g
+  %src1 = sext i16 %val to i64
+  %cond = icmp slt i64 %src1, %src2
+  br i1 %cond, label %exit, label %mulb
+mulb:
+  %mul = mul i64 %src2, %src2
+  br label %exit
+exit:
+  %res = phi i64 [ %src2, %entry ], [ %mul, %mulb ]
+  ret i64 %res
+}