; CHECK-NEXT: jl
; CHECK: br %r14
entry:
- %val = load i32 *@g
+ %val = load i32 , i32 *@g
%src2 = zext i32 %val to i64
%cond = icmp ult i64 %src1, %src2
br i1 %cond, label %exit, label %mulb
; CHECK-NOT: clgfrl
; CHECK: br %r14
entry:
- %val = load i32 *@g
+ %val = load i32 , i32 *@g
%src2 = zext i32 %val to i64
%cond = icmp slt i64 %src1, %src2
br i1 %cond, label %exit, label %mulb
; CHECK-NEXT: je
; CHECK: br %r14
entry:
- %val = load i32 *@g
+ %val = load i32 , i32 *@g
%src2 = zext i32 %val to i64
%cond = icmp eq i64 %src1, %src2
br i1 %cond, label %exit, label %mulb
; CHECK-NEXT: jlh
; CHECK: br %r14
entry:
- %val = load i32 *@g
+ %val = load i32 , i32 *@g
%src2 = zext i32 %val to i64
%cond = icmp ne i64 %src1, %src2
br i1 %cond, label %exit, label %mulb
; CHECK-NEXT: jl
; CHECK: br %r14
entry:
- %val = load i32 *@h, align 2
+ %val = load i32 , i32 *@h, align 2
%src2 = zext i32 %val to i64
%cond = icmp ult i64 %src1, %src2
br i1 %cond, label %exit, label %mulb
%res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
ret i64 %res
}
+
+; Check the comparison can be reversed if that allows CLGFRL to be used.
+define i64 @f6(i64 %src2) {
+; CHECK-LABEL: f6:
+; CHECK: clgfrl %r2, g
+; CHECK-NEXT: jh {{\.L.*}}
+; CHECK: br %r14
+entry:
+ %val = load i32 , i32 *@g
+ %src1 = zext i32 %val to i64
+ %cond = icmp ult i64 %src1, %src2
+ br i1 %cond, label %exit, label %mulb
+mulb:
+ %mul = mul i64 %src2, %src2
+ br label %exit
+exit:
+ %res = phi i64 [ %src2, %entry ], [ %mul, %mulb ]
+ ret i64 %res
+}