Revert r198208 and reapply:

[oota-llvm.git] / test / CodeGen / SystemZ / int-cmp-43.ll

diff --git a/test/CodeGen/SystemZ/int-cmp-43.ll b/test/CodeGen/SystemZ/int-cmp-43.ll
index 7d4adcab06166c0bd0646818d12a60d1198e57ba..1a625886dec2b4ad38c2140a44204f207fe7c322 100644 (file)
--- a/test/CodeGen/SystemZ/int-cmp-43.ll
+++ b/test/CodeGen/SystemZ/int-cmp-43.ll
@@ -8,7 +8,7 @@
 
 ; Check signed comparisons.
 define i64 @f1(i64 %src1) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
 ; CHECK: cgrl %r2, g
 ; CHECK-NEXT: jl
 ; CHECK: br %r14
@@ -26,7 +26,7 @@ exit:
 
 ; Check unsigned comparisons.
 define i64 @f2(i64 %src1) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
 ; CHECK: clgrl %r2, g
 ; CHECK-NEXT: jl
 ; CHECK: br %r14
@@ -44,7 +44,7 @@ exit:
 
 ; Check equality, which can use CRL or CLRL.
 define i64 @f3(i64 %src1) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
 ; CHECK: c{{l?}}grl %r2, g
 ; CHECK-NEXT: je
 ; CHECK: br %r14
@@ -62,7 +62,7 @@ exit:
 
 ; ...likewise inequality.
 define i64 @f4(i64 %src1) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
 ; CHECK: c{{l?}}grl %r2, g
 ; CHECK-NEXT: jlh
 ; CHECK: br %r14
@@ -80,7 +80,7 @@ exit:
 
 ; Repeat f1 with an unaligned address.
 define i64 @f5(i64 %src1) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
 ; CHECK: larl [[REG:%r[0-5]]], h
 ; CHECK: cg %r2, 0([[REG]])
 ; CHECK-NEXT: jl
@@ -96,3 +96,21 @@ exit:
   %res = phi i64 [ %src1, %entry ], [ %mul, %mulb ]
   ret i64 %res
 }
+
+; Check the comparison can be reversed if that allows CGRL to be used.
+define i64 @f6(i64 %src2) {
+; CHECK-LABEL: f6:
+; CHECK: cgrl %r2, g
+; CHECK-NEXT: jh {{\.L.*}}
+; CHECK: br %r14
+entry:
+  %src1 = load i64 *@g
+  %cond = icmp slt i64 %src1, %src2
+  br i1 %cond, label %exit, label %mulb
+mulb:
+  %mul = mul i64 %src2, %src2
+  br label %exit
+exit:
+  %res = phi i64 [ %src2, %entry ], [ %mul, %mulb ]
+  ret i64 %res
+}