[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / Thumb / barrier.ll

diff --git a/test/CodeGen/Thumb/barrier.ll b/test/CodeGen/Thumb/barrier.ll
index 0081837054a1383ca3061a850403c8eafceb1fab..92d9bb2097ff72c9bddc80b8a89b9bcd0402e47d 100644 (file)
--- a/test/CodeGen/Thumb/barrier.ll
+++ b/test/CodeGen/Thumb/barrier.ll
@@ -1,24 +1,13 @@
-; RUN: llc < %s -march=thumb -mattr=+v6      | FileCheck %s -check-prefix=V6
-; RUN: llc < %s -march=thumb -mcpu=cortex-m0 | FileCheck %s -check-prefix=M0
-
-declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1 )
+; RUN: llc -mtriple=thumbv6-apple-darwin %s -o - | FileCheck %s -check-prefix=V6
+; RUN: llc -mtriple=thumbv7-apple-darwin -mattr=-db %s -o - | FileCheck %s -check-prefix=V6
+; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m0 %s -o - | FileCheck %s -check-prefix=V6M
 
 define void @t1() {
-; V6: t1:
-; V6: blx {{_*}}sync_synchronize
-
-; M0: t1:
-; M0: dsb
-  call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 true )
-  ret void
-}
-
-define void @t2() {
-; V6: t2:
+; V6-LABEL: t1:
 ; V6: blx {{_*}}sync_synchronize
 
-; M0: t2:
-; M0: dmb
-  call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 false )
+; V6M-LABEL: t1:
+; V6M: dmb sy
+  fence seq_cst
   ret void
 }