[Hexagon] Fixing load instruction parsing and reenabling tests.

[oota-llvm.git] / test / CodeGen / Thumb / barrier.ll

diff --git a/test/CodeGen/Thumb/barrier.ll b/test/CodeGen/Thumb/barrier.ll
index d39b50f0a9daf7968af953ecc61956483adc8acb..92d9bb2097ff72c9bddc80b8a89b9bcd0402e47d 100644 (file)
--- a/test/CodeGen/Thumb/barrier.ll
+++ b/test/CodeGen/Thumb/barrier.ll
@@ -1,25 +1,13 @@
-; RUN: llc < %s -mtriple=thumbv6-apple-darwin  | FileCheck %s -check-prefix=V6
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=-db | FileCheck %s -check-prefix=V6
-; RUN: llc < %s -march=thumb -mcpu=cortex-m0   | FileCheck %s -check-prefix=V6M
-
-declare void @llvm.memory.barrier(i1 , i1 , i1 , i1 , i1)
+; RUN: llc -mtriple=thumbv6-apple-darwin %s -o - | FileCheck %s -check-prefix=V6
+; RUN: llc -mtriple=thumbv7-apple-darwin -mattr=-db %s -o - | FileCheck %s -check-prefix=V6
+; RUN: llc -mtriple=thumb-eabi -mcpu=cortex-m0 %s -o - | FileCheck %s -check-prefix=V6M
 
 define void @t1() {
-; V6: t1:
-; V6: blx {{_*}}sync_synchronize
-
-; V6M: t1:
-; V6M: dmb st
-  call void @llvm.memory.barrier(i1 false, i1 false, i1 false, i1 true, i1 true)
-  ret void
-}
-
-define void @t2() {
-; V6: t2:
+; V6-LABEL: t1:
 ; V6: blx {{_*}}sync_synchronize
 
-; V6M: t2:
-; V6M: dmb ish
-  call void @llvm.memory.barrier(i1 true, i1 false, i1 false, i1 true, i1 false)
+; V6M-LABEL: t1:
+; V6M: dmb sy
+  fence seq_cst
   ret void
 }