Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks

[oota-llvm.git] / test / CodeGen / Thumb2 / 2009-08-04-SubregLoweringBug3.ll

diff --git a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll
index 9f74e0a806f5ad7b4f0beca2b7ee36a93c9f6b13..ad32dc9d0a07415da0a9b713955fcfe03a7e7ffc 100644 (file)
--- a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll
+++ b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp
+; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8
 ; rdar://7117307
 
        %struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List }
@@ -6,7 +6,7 @@
        %struct.Patient = type { i32, i32, i32, %struct.Village* }
        %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 }
 
-define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind {
+define %struct.List* @sim(%struct.Village* %village) nounwind {
 entry:
        br i1 undef, label %bb14, label %bb3.preheader