AArch64: Implement conditional compare sequence matching.

[oota-llvm.git] / test / CodeGen / X86 / 2007-10-29-ExtendSetCC.ll

diff --git a/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll b/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
index 573a2177b74ebb9f747c90cd2323094bb681be82..9f57df87fe48570dd64f4279754c392be4cca713 100644 (file)
--- a/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
+++ b/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
@@ -2,7 +2,7 @@
 
 define signext i16 @t()   {
 entry:
-       %tmp180 = load i16* null, align 2               ; <i16> [#uses=3]
+       %tmp180 = load i16, i16* null, align 2          ; <i16> [#uses=3]
        %tmp180181 = sext i16 %tmp180 to i32            ; <i32> [#uses=1]
        %tmp185 = icmp slt i16 %tmp180, 0               ; <i1> [#uses=1]
        br i1 %tmp185, label %cond_true188, label %cond_next245