AArch64: Implement conditional compare sequence matching.

[oota-llvm.git] / test / CodeGen / X86 / 2007-10-29-ExtendSetCC.ll

diff --git a/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll b/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
index 9013e9020efa45a2b52e719aedf52415b5621147..9f57df87fe48570dd64f4279754c392be4cca713 100644 (file)
--- a/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
+++ b/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
@@ -1,8 +1,8 @@
-; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 1
+; RUN: llc < %s -march=x86 | grep mov | count 1
 
-define i16 @t() signext  {
+define signext i16 @t()   {
 entry:
-       %tmp180 = load i16* null, align 2               ; <i16> [#uses=3]
+       %tmp180 = load i16, i16* null, align 2          ; <i16> [#uses=3]
        %tmp180181 = sext i16 %tmp180 to i32            ; <i32> [#uses=1]
        %tmp185 = icmp slt i16 %tmp180, 0               ; <i1> [#uses=1]
        br i1 %tmp185, label %cond_true188, label %cond_next245