-; RUN: llvm-as < %s | llc -march=x86
+; RUN: llc < %s -march=x86
+; RUN: llc -pre-RA-sched=source < %s -march=x86 -mcpu=corei7 | FileCheck %s --check-prefix=SOURCE-SCHED
; PR2748
@g_73 = external global i32 ; <i32*> [#uses=1]
define i32 @func_44(i16 signext %p_46) nounwind {
entry:
- %0 = load i32* @g_5, align 4 ; <i32> [#uses=1]
+; SOURCE-SCHED: subl
+; SOURCE-SCHED: movl
+; SOURCE-SCHED: sarl
+; SOURCE-SCHED: cmpl
+; SOURCE-SCHED: setg
+; SOURCE-SCHED: movzbl
+; SOURCE-SCHED: movb
+; SOURCE-SCHED: xorl
+; SOURCE-SCHED: subl
+; SOURCE-SCHED: testb
+; SOURCE-SCHED: jne
+ %0 = load i32, i32* @g_5, align 4 ; <i32> [#uses=1]
%1 = ashr i32 %0, 1 ; <i32> [#uses=1]
%2 = icmp sgt i32 %1, 1 ; <i1> [#uses=1]
%3 = zext i1 %2 to i32 ; <i32> [#uses=1]
- %4 = load i32* @g_73, align 4 ; <i32> [#uses=1]
+ %4 = load i32, i32* @g_73, align 4 ; <i32> [#uses=1]
%5 = zext i16 %p_46 to i64 ; <i64> [#uses=1]
%6 = sub i64 0, %5 ; <i64> [#uses=1]
%7 = trunc i64 %6 to i8 ; <i8> [#uses=2]
%.014.in = phi i8 [ %10, %bb11 ], [ %7, %entry ] ; <i8> [#uses=1]
%11 = icmp ne i8 %.014.in, 0 ; <i1> [#uses=1]
%12 = zext i1 %11 to i32 ; <i32> [#uses=1]
- %13 = tail call i32 (...)* @func_48( i32 %12, i32 %3, i32 0 ) nounwind ; <i32> [#uses=0]
+ %13 = tail call i32 (...) @func_48( i32 %12, i32 %3, i32 0 ) nounwind ; <i32> [#uses=0]
ret i32 undef
}