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This commit enables unaligned memory accesses of vector types on AArch64 back end...
[oota-llvm.git]
/
test
/
CodeGen
/
X86
/
2008-12-01-loop-iv-used-outside-loop.ll
diff --git
a/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
b/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
index ca5a80ccd82b5f817a199c3b08d11b83a3327ba3..1f8bd45da14d53e4082d6abe44594fff8f4b9b4f 100644
(file)
--- a/
test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
+++ b/
test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
@@
-1,4
+1,4
@@
-; RUN: ll
vm-as < %s | llc
-mtriple=i386-apple-darwin | not grep lea
+; RUN: ll
c < %s
-mtriple=i386-apple-darwin | not grep lea
; The inner loop should use [reg] addressing, not [reg+reg] addressing.
; rdar://6403965