CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / 2009-08-06-inlineasm.ll

diff --git a/test/CodeGen/X86/2009-08-06-inlineasm.ll b/test/CodeGen/X86/2009-08-06-inlineasm.ll
index b1c2b28b479b26596bfea8de7ae50d71832293ac..f548bc0930262c3ee4dd007b9048eb5abd1b8f69 100644 (file)
--- a/test/CodeGen/X86/2009-08-06-inlineasm.ll
+++ b/test/CodeGen/X86/2009-08-06-inlineasm.ll
@@ -1,8 +1,12 @@
-; RUN: llvm-as < %s | llc
+; RUN: false
+; XRUN: llc -mtriple=i386-pc-linux-gnu < %s
 ; PR4668
-; ModuleID = '<stdin>'
-target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
-target triple = "i386-pc-linux-gnu"
+; XFAIL: *
+; FIXME: If the coalescer happens to coalesce %level.1 with the copy to EAX
+; (for ret) then this will fail to compile. The fundamental problem is
+; once the coalescer fixes a virtual register to physical register we can't
+; evict it. This started passing again due to the changes for PR8969
+; so I've disabled it with a bigger stick.
 
 define i32 @x(i32 %qscale) nounwind {
 entry:
@@ -15,12 +19,12 @@ if.then28:          ; preds = %entry
 
 if.end78:              ; preds = %if.then28, %entry
        %level.1 = phi i32 [ %tmp, %if.then28 ], [ 0, %entry ]          ; <i32> [#uses=1]
-       %add.ptr1 = getelementptr [64 x i16]* null, i32 0, i32 %qscale          ; <i16*> [#uses=1]
-       %add.ptr2 = getelementptr [64 x i16]* null, i32 1, i32 %qscale          ; <i16*> [#uses=1]
-       %add.ptr3 = getelementptr [64 x i16]* null, i32 2, i32 %qscale          ; <i16*> [#uses=1]
-       %add.ptr4 = getelementptr [64 x i16]* null, i32 3, i32 %qscale          ; <i16*> [#uses=1]
-       %add.ptr5 = getelementptr [64 x i16]* null, i32 4, i32 %qscale          ; <i16*> [#uses=1]
-       %add.ptr6 = getelementptr [64 x i16]* null, i32 5, i32 %qscale          ; <i16*> [#uses=1]
+       %add.ptr1 = getelementptr [64 x i16], [64 x i16]* null, i32 0, i32 %qscale              ; <i16*> [#uses=1]
+       %add.ptr2 = getelementptr [64 x i16], [64 x i16]* null, i32 1, i32 %qscale              ; <i16*> [#uses=1]
+       %add.ptr3 = getelementptr [64 x i16], [64 x i16]* null, i32 2, i32 %qscale              ; <i16*> [#uses=1]
+       %add.ptr4 = getelementptr [64 x i16], [64 x i16]* null, i32 3, i32 %qscale              ; <i16*> [#uses=1]
+       %add.ptr5 = getelementptr [64 x i16], [64 x i16]* null, i32 4, i32 %qscale              ; <i16*> [#uses=1]
+       %add.ptr6 = getelementptr [64 x i16], [64 x i16]* null, i32 5, i32 %qscale              ; <i16*> [#uses=1]
        %tmp1 = call i32 asm sideeffect "nop", "={ax},r,r,r,r,r,0,~{dirflag},~{fpsr},~{flags}"(i16* %add.ptr6, i16* %add.ptr5, i16* %add.ptr4, i16* %add.ptr3, i16* %add.ptr2, i16* %add.ptr1) nounwind         ; <i32> [#uses=0]
        ret i32 %level.1
 }