[x32] Fix FrameIndex check in SelectLEA64_32Addr

[oota-llvm.git] / test / CodeGen / X86 / 2010-01-08-Atomic64Bug.ll

diff --git a/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll b/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll
index 172e1c73d568199bc993e7d08e678c8ba2bdd4c2..850f678c9c2cf11d6d079322e0d21638066e19c1 100644 (file)
--- a/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll
+++ b/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=corei7 | FileCheck %s
 ; rdar://r7512579
 
 ; PHI defs in the atomic loop should be used by the add / adc
@@ -6,24 +6,17 @@
 
 define void @t(i64* nocapture %p) nounwind ssp {
 entry:
-; CHECK: t:
-; CHECK: movl $1
-; CHECK: movl (%ebp), %eax
-; CHECK: movl 4(%ebp), %edx
-; CHECK: LBB1_1:
-; CHECK-NOT: movl $1
-; CHECK-NOT: movl $0
-; CHECK: addl
-; CHECK: adcl
+; CHECK-LABEL: t:
+; CHECK: movl ([[REG:%[a-z]+]]), %eax
+; CHECK: movl 4([[REG]]), %edx
+; CHECK: LBB0_1:
+; CHECK: movl %eax, %ebx
+; CHECK: addl $1, %ebx
+; CHECK: movl %edx, %ecx
+; CHECK: adcl $0, %ecx
 ; CHECK: lock
-; CHECK: cmpxchg8b
-; CHECK: jne
-  tail call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
-  %0 = tail call i64 @llvm.atomic.load.add.i64.p0i64(i64* %p, i64 1) ; <i64> [#uses=0]
-  tail call void @llvm.memory.barrier(i1 true, i1 true, i1 true, i1 true, i1 true)
+; CHECK-NEXT: cmpxchg8b ([[REG]])
+; CHECK-NEXT: jne
+  %0 = atomicrmw add i64* %p, i64 1 seq_cst
   ret void
 }
-
-declare void @llvm.memory.barrier(i1, i1, i1, i1, i1) nounwind
-
-declare i64 @llvm.atomic.load.add.i64.p0i64(i64* nocapture, i64) nounwind