CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / asm-reject-reg-type-mismatch.ll

diff --git a/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll b/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
index 016e2d261eef60a89129f75a1c19b975c3dc5dd0..c7e86f565eefae8a58ed10baec777a3ac3ebaada 100644 (file)
--- a/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
+++ b/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
@@ -1,10 +1,8 @@
-; RUN: not llc -no-integrated-as %s -o - 2> %t1
-; RUN: FileCheck %s < %t1
-target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
+; RUN: not llc -o /dev/null %s 2>&1 | FileCheck %s
 target triple = "x86_64--"
 
 ; CHECK: error: couldn't allocate output register for constraint '{ax}'
 define i128 @blup() {
-  %v = tail call i128 asm "", "={ax},0,~{dirflag},~{fpsr},~{flags}"(i128 0)
+  %v = tail call i128 asm "", "={ax},0"(i128 0)
   ret i128 %v
 }