CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / avx-unpack.ll

diff --git a/test/CodeGen/X86/avx-unpack.ll b/test/CodeGen/X86/avx-unpack.ll
index 20f534532263bc50dfadfcfaf6c03072f80da82c..6924d98b38b177603399a45af4786bb738896dbc 100644 (file)
--- a/test/CodeGen/X86/avx-unpack.ll
+++ b/test/CodeGen/X86/avx-unpack.ll
@@ -70,8 +70,8 @@ entry:
 ; CHECK: vunpckhps (%
 define <8 x i32> @unpackhips2(<8 x i32>* %src1, <8 x i32>* %src2) nounwind uwtable readnone ssp {
 entry:
-  %a = load <8 x i32>* %src1
-  %b = load <8 x i32>* %src2
+  %a = load <8 x i32>, <8 x i32>* %src1
+  %b = load <8 x i32>, <8 x i32>* %src2
   %shuffle.i = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15>
   ret <8 x i32> %shuffle.i
 }
@@ -86,8 +86,8 @@ entry:
 ; CHECK: vunpckhpd (%
 define <4 x i64> @unpackhipd2(<4 x i64>* %src1, <4 x i64>* %src2) nounwind uwtable readnone ssp {
 entry:
-  %a = load <4 x i64>* %src1
-  %b = load <4 x i64>* %src2
+  %a = load <4 x i64>, <4 x i64>* %src1
+  %b = load <4 x i64>, <4 x i64>* %src2
   %shuffle.i = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   ret <4 x i64> %shuffle.i
 }
@@ -102,8 +102,8 @@ entry:
 ; CHECK: vunpcklps (%
 define <8 x i32> @unpacklops2(<8 x i32>* %src1, <8 x i32>* %src2) nounwind uwtable readnone ssp {
 entry:
-  %a = load <8 x i32>* %src1
-  %b = load <8 x i32>* %src2
+  %a = load <8 x i32>, <8 x i32>* %src1
+  %b = load <8 x i32>, <8 x i32>* %src2
   %shuffle.i = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13>
   ret <8 x i32> %shuffle.i
 }
@@ -118,8 +118,8 @@ entry:
 ; CHECK: vunpcklpd (%
 define <4 x i64> @unpacklopd2(<4 x i64>* %src1, <4 x i64>* %src2) nounwind uwtable readnone ssp {
 entry:
-  %a = load <4 x i64>* %src1
-  %b = load <4 x i64>* %src2
+  %a = load <4 x i64>, <4 x i64>* %src1
+  %b = load <4 x i64>, <4 x i64>* %src2
   %shuffle.i = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   ret <4 x i64> %shuffle.i
 }