[x86] lower calls to fmin and llvm.minnum.* using minss/minsd/minps/minpd (PR24475)

[oota-llvm.git] / test / CodeGen / X86 / avx2-phaddsub.ll

diff --git a/test/CodeGen/X86/avx2-phaddsub.ll b/test/CodeGen/X86/avx2-phaddsub.ll
index 4eac71d08b4f2e8bfdb7664a933fe8eb33c0b711..3f9c95cfd070900a7367029407991ae03f63b037 100644 (file)
--- a/test/CodeGen/X86/avx2-phaddsub.ll
+++ b/test/CodeGen/X86/avx2-phaddsub.ll
@@ -1,6 +1,6 @@
 ; RUN: llc < %s -march=x86-64 -mattr=+avx2 | FileCheck %s
 
-; CHECK: phaddw1:
+; CHECK-LABEL: phaddw1:
 ; CHECK: vphaddw
 define <16 x i16> @phaddw1(<16 x i16> %x, <16 x i16> %y) {
   %a = shufflevector <16 x i16> %x, <16 x i16> %y, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30>
@@ -9,7 +9,7 @@ define <16 x i16> @phaddw1(<16 x i16> %x, <16 x i16> %y) {
   ret <16 x i16> %r
 }
 
-; CHECK: phaddw2:
+; CHECK-LABEL: phaddw2:
 ; CHECK: vphaddw
 define <16 x i16> @phaddw2(<16 x i16> %x, <16 x i16> %y) {
   %a = shufflevector <16 x i16> %x, <16 x i16> %y, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 17, i32 19, i32 21, i32 23, i32 9, i32 11, i32 13, i32 15, i32 25, i32 27, i32 29, i32 31>
@@ -18,7 +18,7 @@ define <16 x i16> @phaddw2(<16 x i16> %x, <16 x i16> %y) {
   ret <16 x i16> %r
 }
 
-; CHECK: phaddd1:
+; CHECK-LABEL: phaddd1:
 ; CHECK: vphaddd
 define <8 x i32> @phaddd1(<8 x i32> %x, <8 x i32> %y) {
   %a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14>
@@ -27,7 +27,7 @@ define <8 x i32> @phaddd1(<8 x i32> %x, <8 x i32> %y) {
   ret <8 x i32> %r
 }
 
-; CHECK: phaddd2:
+; CHECK-LABEL: phaddd2:
 ; CHECK: vphaddd
 define <8 x i32> @phaddd2(<8 x i32> %x, <8 x i32> %y) {
   %a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 1, i32 2, i32 9, i32 10, i32 5, i32 6, i32 13, i32 14>
@@ -36,7 +36,7 @@ define <8 x i32> @phaddd2(<8 x i32> %x, <8 x i32> %y) {
   ret <8 x i32> %r
 }
 
-; CHECK: phaddd3:
+; CHECK-LABEL: phaddd3:
 ; CHECK: vphaddd
 define <8 x i32> @phaddd3(<8 x i32> %x) {
   %a = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> <i32 undef, i32 2, i32 8, i32 10, i32 4, i32 6, i32 undef, i32 14>
@@ -45,7 +45,7 @@ define <8 x i32> @phaddd3(<8 x i32> %x) {
   ret <8 x i32> %r
 }
 
-; CHECK: phsubw1:
+; CHECK-LABEL: phsubw1:
 ; CHECK: vphsubw
 define <16 x i16> @phsubw1(<16 x i16> %x, <16 x i16> %y) {
   %a = shufflevector <16 x i16> %x, <16 x i16> %y, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 16, i32 18, i32 20, i32 22, i32 8, i32 10, i32 12, i32 14, i32 24, i32 26, i32 28, i32 30>
@@ -54,7 +54,7 @@ define <16 x i16> @phsubw1(<16 x i16> %x, <16 x i16> %y) {
   ret <16 x i16> %r
 }
 
-; CHECK: phsubd1:
+; CHECK-LABEL: phsubd1:
 ; CHECK: vphsubd
 define <8 x i32> @phsubd1(<8 x i32> %x, <8 x i32> %y) {
   %a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 0, i32 2, i32 8, i32 10, i32 4, i32 6, i32 12, i32 14>
@@ -63,7 +63,7 @@ define <8 x i32> @phsubd1(<8 x i32> %x, <8 x i32> %y) {
   ret <8 x i32> %r
 }
 
-; CHECK: phsubd2:
+; CHECK-LABEL: phsubd2:
 ; CHECK: vphsubd
 define <8 x i32> @phsubd2(<8 x i32> %x, <8 x i32> %y) {
   %a = shufflevector <8 x i32> %x, <8 x i32> %y, <8 x i32> <i32 0, i32 undef, i32 8, i32 undef, i32 4, i32 6, i32 12, i32 14>