CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / byval.ll

diff --git a/test/CodeGen/X86/byval.ll b/test/CodeGen/X86/byval.ll
index 7c0aeb82327c74d4d90e40fae49be8d113e32364..f29511a54c4155216bacf0bb816439315f23211b 100644 (file)
--- a/test/CodeGen/X86/byval.ll
+++ b/test/CodeGen/X86/byval.ll
@@ -1,10 +1,17 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep movq.*8.*rsp.*rax
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck -check-prefix=X86-64 %s
+; Win64 has not supported byval yet.
+; RUN: llc < %s -march=x86 | FileCheck -check-prefix=X86 %s
+
+; X86: movl    4(%esp), %eax
+; X86: movl    8(%esp), %edx
+
+; X86-64: movq 8(%rsp), %rax
 
 %struct.s = type { i64, i64, i64 }
 
 define i64 @f(%struct.s* byval %a) {
 entry:
-       %tmp2 = getelementptr %struct.s* %a, i32 0, i32 0
-       %tmp3 = load i64* %tmp2, align 8
+       %tmp2 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 0
+       %tmp3 = load i64, i64* %tmp2, align 8
        ret i64 %tmp3
 }