Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.

[oota-llvm.git] / test / CodeGen / X86 / byval2.ll

diff --git a/test/CodeGen/X86/byval2.ll b/test/CodeGen/X86/byval2.ll
index 04d34839c0e76695b8517d5111f58a17001ef270..196efe58e6f3e1512d4cd26783079f85c85ab671 100644 (file)
--- a/test/CodeGen/X86/byval2.ll
+++ b/test/CodeGen/X86/byval2.ll
@@ -1,6 +1,32 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | grep rep.movsl | count 2
+; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
+; X64-NOT:     movsq
+; X64:     rep
+; X64-NOT:     rep
+; X64:     movsq
+; X64-NOT:     movsq
+; X64:     rep
+; X64-NOT:     rep
+; X64:     movsq
+; X64-NOT:     rep
+; X64-NOT:     movsq
 
-%struct.s = type { i64, i64, i64 }
+; Win64 has not supported byval yet.
+
+; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
+; X32-NOT:     movsl
+; X32:     rep
+; X32-NOT:     rep
+; X32:     movsl
+; X32-NOT:     movsl
+; X32:     rep
+; X32-NOT:     rep
+; X32:     movsl
+; X32-NOT:     rep
+; X32-NOT:     movsl
+
+%struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64,
+                   i64, i64, i64, i64, i64, i64, i64, i64,
+                   i64 }
 
 define void @g(i64 %a, i64 %b, i64 %c) {
 entry:
@@ -11,8 +37,8 @@ entry:
        store i64 %b, i64* %tmp2, align 16
        %tmp4 = getelementptr %struct.s* %d, i32 0, i32 2
        store i64 %c, i64* %tmp4, align 16
-       call void @f( %struct.s* %d byval)
-       call void @f( %struct.s* %d byval)
+       call void @f( %struct.s*byval %d )
+       call void @f( %struct.s*byval %d )
        ret void
 }