This commit enables unaligned memory accesses of vector types on AArch64 back end...

[oota-llvm.git] / test / CodeGen / X86 / divide-by-constant.ll

diff --git a/test/CodeGen/X86/divide-by-constant.ll b/test/CodeGen/X86/divide-by-constant.ll
index 8e7c13d8efa9cdc706e8db05e5a6aed7482c1e18..98ae1d51db2101c29ebcf90b07a745bd0e7feb96 100644 (file)
--- a/test/CodeGen/X86/divide-by-constant.ll
+++ b/test/CodeGen/X86/divide-by-constant.ll
@@ -6,7 +6,7 @@ define zeroext i16 @test1(i16 zeroext %x) nounwind {
 entry:
        %div = udiv i16 %x, 33
        ret i16 %div
-; CHECK: test1:
+; CHECK-LABEL: test1:
 ; CHECK: imull $63551, %eax, %eax
 ; CHECK-NEXT: shrl     $21, %eax
 ; CHECK-NEXT: ret
@@ -17,7 +17,7 @@ entry:
   %div = udiv i16 %c, 3
   ret i16 %div
 
-; CHECK: test2:
+; CHECK-LABEL: test2:
 ; CHECK: imull $43691, %eax, %eax
 ; CHECK-NEXT: shrl     $17, %eax
 ; CHECK-NEXT: ret
@@ -28,7 +28,7 @@ entry:
   %div = udiv i8 %c, 3
   ret i8 %div
 
-; CHECK: test3:
+; CHECK-LABEL: test3:
 ; CHECK: movzbl  8(%esp), %eax
 ; CHECK-NEXT: imull    $171, %eax, %eax
 ; CHECK-NEXT: shrl     $9, %eax
@@ -39,14 +39,14 @@ define signext i16 @test4(i16 signext %x) nounwind {
 entry:
        %div = sdiv i16 %x, 33          ; <i32> [#uses=1]
        ret i16 %div
-; CHECK: test4:
+; CHECK-LABEL: test4:
 ; CHECK: imull $1986, %eax, %
 }
 
 define i32 @test5(i32 %A) nounwind {
         %tmp1 = udiv i32 %A, 1577682821         ; <i32> [#uses=1]
         ret i32 %tmp1
-; CHECK: test5:
+; CHECK-LABEL: test5:
 ; CHECK: movl  $365384439, %eax
 ; CHECK: mull  4(%esp)
 }
@@ -55,16 +55,16 @@ define signext i16 @test6(i16 signext %x) nounwind {
 entry:
   %div = sdiv i16 %x, 10
   ret i16 %div
-; CHECK: test6:
-; CHECK: imull $26215, %eax, %eax
-; CHECK: shrl  $31, %ecx
-; CHECK: sarl  $18, %eax
+; CHECK-LABEL: test6:
+; CHECK: imull $26215, %eax, %ecx
+; CHECK: sarl $18, %ecx
+; CHECK: shrl $15, %eax
 }
 
 define i32 @test7(i32 %x) nounwind {
   %div = udiv i32 %x, 28
   ret i32 %div
-; CHECK: test7:
+; CHECK-LABEL: test7:
 ; CHECK: shrl $2
 ; CHECK: movl $613566757
 ; CHECK: mull
@@ -76,7 +76,7 @@ define i32 @test7(i32 %x) nounwind {
 define i8 @test8(i8 %x) nounwind {
   %div = udiv i8 %x, 78
   ret i8 %div
-; CHECK: test8:
+; CHECK-LABEL: test8:
 ; CHECK: shrb %
 ; CHECK: imull $211
 ; CHECK: shrl $13
@@ -86,7 +86,7 @@ define i8 @test8(i8 %x) nounwind {
 define i8 @test9(i8 %x) nounwind {
   %div = udiv i8 %x, 116
   ret i8 %div
-; CHECK: test9:
+; CHECK-LABEL: test9:
 ; CHECK: shrb $2
 ; CHECK: imull $71
 ; CHECK: shrl $11