CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / extractelement-load.ll

diff --git a/test/CodeGen/X86/extractelement-load.ll b/test/CodeGen/X86/extractelement-load.ll
index 732f698f59ff8a0e5c07c6b81edf807b194f6400..e50d353797a0c02f7b979eafde1cf360d447efea 100644 (file)
--- a/test/CodeGen/X86/extractelement-load.ll
+++ b/test/CodeGen/X86/extractelement-load.ll
@@ -9,7 +9,7 @@ define i32 @t(<2 x i64>* %val) nounwind  {
 ; CHECK-NOT: movd
 ; CHECK: movl 8(
 ; CHECK-NEXT: ret
-       %tmp2 = load <2 x i64>* %val, align 16          ; <<2 x i64>> [#uses=1]
+       %tmp2 = load <2 x i64>, <2 x i64>* %val, align 16               ; <<2 x i64>> [#uses=1]
        %tmp3 = bitcast <2 x i64> %tmp2 to <4 x i32>            ; <<4 x i32>> [#uses=1]
        %tmp4 = extractelement <4 x i32> %tmp3, i32 2           ; <i32> [#uses=1]
        ret i32 %tmp4
@@ -20,7 +20,7 @@ define i32 @t(<2 x i64>* %val) nounwind  {
 define i32 @t2(<8 x i32>* %xp) {
 ; CHECK-LABEL: t2:
 ; CHECK: ret
-  %x = load <8 x i32>* %xp
+  %x = load <8 x i32>, <8 x i32>* %xp
   %Shuff68 = shufflevector <8 x i32> %x, <8 x i32> undef, <8 x i32> <i32
 undef, i32 7, i32 9, i32 undef, i32 13, i32 15, i32 1, i32 3>
   %y = extractelement <8 x i32> %Shuff68, i32 0
@@ -41,7 +41,7 @@ define void @t3() {
 ; CHECK: movhpd
 
 bb:
-  %tmp13 = load <2 x double>* undef, align 1
+  %tmp13 = load <2 x double>, <2 x double>* undef, align 1
   %.sroa.3.24.vec.extract = extractelement <2 x double> %tmp13, i32 1
   store double %.sroa.3.24.vec.extract, double* undef, align 8
   unreachable
@@ -55,7 +55,7 @@ define i64 @t4(<2 x double>* %a) {
 ; CHECK-LABEL: t4:
 ; CHECK: mov
 ; CHECK: ret
-  %b = load <2 x double>* %a, align 16
+  %b = load <2 x double>, <2 x double>* %a, align 16
   %c = shufflevector <2 x double> %b, <2 x double> %b, <2 x i32> <i32 1, i32 0>
   %d = bitcast <2 x double> %c to <2 x i64>
   %e = extractelement <2 x i64> %d, i32 1