CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / fast-cc-merge-stack-adj.ll

diff --git a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll
index e6cd0f0da94b2535bef9504582049e804a6044a6..d9cfaa4c265694bf8c08c10b9c6b2a1cc344ceef 100644 (file)
--- a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll
+++ b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll
@@ -1,11 +1,13 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc  | grep 'add ESP, 8'
+; RUN: llc < %s -mcpu=generic -march=x86 -x86-asm-syntax=intel | FileCheck %s
+; CHECK: add esp, 8
 
 target triple = "i686-pc-linux-gnu"
 
-declare fastcc void %func(int *%X, long %Y)
+declare x86_fastcallcc void @func(i32*, i64 inreg)
 
-fastcc void %caller(int, long) {
-       %X = alloca int
-       call fastcc void %func(int* %X, long 0)   ;; not a tail call
-       ret void
+define x86_fastcallcc void @caller(i32, i64) {
+        %X = alloca i32         ; <i32*> [#uses=1]
+        call x86_fastcallcc void @func( i32* %X, i64 0 )
+        ret void
 }
+