Don't pull vector sext through both hands of a logical operation, since doing so...

[oota-llvm.git] / test / CodeGen / X86 / fast-cc-pass-in-regs.ll

diff --git a/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/test/CodeGen/X86/fast-cc-pass-in-regs.ll
index 55dbcbfe935a97e6853cc43c8f5a37914f20963d..fe96c0c8be2a17e500bcfd959a649430ccc35fd3 100644 (file)
--- a/test/CodeGen/X86/fast-cc-pass-in-regs.ll
+++ b/test/CodeGen/X86/fast-cc-pass-in-regs.ll
@@ -1,14 +1,15 @@
-; llvm-as < %s | llc -x86-asm-syntax=intel -enable-x86-fastcc  | grep 'mov %EDX, 1'
-
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
+; RUN:   grep {mov     EDX, 1}
 ; check that fastcc is passing stuff in regs.
 
-declare fastcc long %callee(long)
+declare x86_fastcallcc i64 @callee(i64)
 
-long %caller() {
-       %X = call fastcc long %callee(long 4294967299)  ;; (1ULL << 32) + 3
-       ret long %X
+define i64 @caller() {
+        %X = call x86_fastcallcc  i64 @callee( i64 4294967299 )          ; <i64> [#uses=1]
+        ret i64 %X
 }
 
-fastcc long %caller2(long %X) {
-       ret long %X
+define x86_fastcallcc i64 @caller2(i64 %X) {
+        ret i64 %X
 }
+