Implement a feature (-vector-unaligned-mem) to allow targets to

[oota-llvm.git] / test / CodeGen / X86 / fast-cc-pass-in-regs.ll

diff --git a/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/test/CodeGen/X86/fast-cc-pass-in-regs.ll
index 67c22fff2751705cadc227175b6d5e47dcb90f2e..fe96c0c8be2a17e500bcfd959a649430ccc35fd3 100644 (file)
--- a/test/CodeGen/X86/fast-cc-pass-in-regs.ll
+++ b/test/CodeGen/X86/fast-cc-pass-in-regs.ll
@@ -1,11 +1,11 @@
-; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | \
+; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
 ; RUN:   grep {mov     EDX, 1}
 ; check that fastcc is passing stuff in regs.
 
 declare x86_fastcallcc i64 @callee(i64)
 
 define i64 @caller() {
-        %X = callx86_fastcallcc  i64 @callee( i64 4294967299 )          ; <i64> [#uses=1]
+        %X = call x86_fastcallcc  i64 @callee( i64 4294967299 )          ; <i64> [#uses=1]
         ret i64 %X
 }