CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / fast-isel-avoid-unnecessary-pic-base.ll

diff --git a/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll b/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll
index 9233d3f7c1a039ed59b7ff8697594037c26d1951..3310e6113f1eb851e45bf8b1f73a254091adfb20 100644 (file)
--- a/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll
+++ b/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll
@@ -1,4 +1,5 @@
-; RUN: llc -O0 -relocation-model=pic < %s | not grep call
+; RUN: llc -O0 -relocation-model=pic < %s | FileCheck %s
+; CHECK-NOT: call
 ; rdar://8396318
 
 ; Don't emit a PIC base register if no addresses are needed.
@@ -14,10 +15,10 @@ entry:
   store i32 %x, i32* %x.addr, align 4
   store i32 %y, i32* %y.addr, align 4
   store i32 %z, i32* %z.addr, align 4
-  %tmp = load i32* %x.addr, align 4
-  %tmp1 = load i32* %y.addr, align 4
+  %tmp = load i32, i32* %x.addr, align 4
+  %tmp1 = load i32, i32* %y.addr, align 4
   %add = add nsw i32 %tmp, %tmp1
-  %tmp2 = load i32* %z.addr, align 4
+  %tmp2 = load i32, i32* %z.addr, align 4
   %add3 = add nsw i32 %add, %tmp2
   ret i32 %add3
 }