Fix ordering of operands on lowering of atomicrmw min/max nodes on ARM.

[oota-llvm.git] / test / CodeGen / X86 / fast-isel-bail.ll

diff --git a/test/CodeGen/X86/fast-isel-bail.ll b/test/CodeGen/X86/fast-isel-bail.ll
index fa65d209b2cfa7feb70c9dfce61b50a01c029543..a485827be96d50d38955a73e4724368331985885 100644 (file)
--- a/test/CodeGen/X86/fast-isel-bail.ll
+++ b/test/CodeGen/X86/fast-isel-bail.ll
@@ -1,9 +1,9 @@
-; RUN: llvm-as < %s | llc -march=x86 -fast
+; RUN: llc < %s -march=x86 -O0
 
 ; This file is for regression tests for cases where FastISel needs
 ; to gracefully bail out and let SelectionDAGISel take over.
 
-       type { i64, i8* }               ; type %0
+       %0 = type { i64, i8* }          ; type %0
 
 declare void @bar(%0)