CodeGen peephole: fold redundant phys reg copies

[oota-llvm.git] / test / CodeGen / X86 / fastcc-byval.ll

diff --git a/test/CodeGen/X86/fastcc-byval.ll b/test/CodeGen/X86/fastcc-byval.ll
index 52b3e57b96bc5f41cd5dd2fe9d2279c0a9c88a47..1706de461116fe77fef596c25966cf6993658f87 100644 (file)
--- a/test/CodeGen/X86/fastcc-byval.ll
+++ b/test/CodeGen/X86/fastcc-byval.ll
@@ -1,4 +1,8 @@
-; RUN: llc < %s -tailcallopt=false | grep {movl\[\[:space:\]\]*8(%esp), %eax} | count 2
+; RUN: llc < %s -tailcallopt=false | FileCheck %s
+; CHECK: movl 8(%esp), %eax 
+; CHECK: movl 8(%esp), %eax 
+; CHECK-NOT: movl 8(%esp), %eax 
+
 ; PR3122
 ; rdar://6400815
 
@@ -10,10 +14,10 @@ target triple = "i386-apple-darwin9.5"
 
 define fastcc i32 @bar() nounwind {
        %V = alloca %struct.MVT
-       %a = getelementptr %struct.MVT* %V, i32 0, i32 0
+       %a = getelementptr %struct.MVT, %struct.MVT* %V, i32 0, i32 0
        store i32 1, i32* %a
        call fastcc void @foo(%struct.MVT* byval %V) nounwind
-       %t = load i32* %a
+       %t = load i32, i32* %a
        ret i32 %t
 }